Kichang Jang

Current-sensing technique for current-mode DC-DC buck converter with offset-voltage compensation

As the technology of SoC (system-on-chip) implementation has been improved, power management IC such as DC-DC converters should be also integrated into a single chip. The current-mode control DC-DC converter is preferred to the voltage-mode one because of simpler frequency compensation scheme, which makes it possible to utilize the chip with less off chip components. In order to achieve an efficient current-mode control, an elaborate current sensing technique should be incorporated to maintain conversion efficiency. In this paper, a new current sensing circuitry is proposed that compensates the offset voltage of the operational amplifier that is used in current-mirroring sensing scheme. The chip is implemented in a 0.35-mum CMOS technology.

A piezoelectric actuator driver circuit for automatic focusing of mobile phone cameras

The analog front end (AFE) chip is presented to perform precise automatic focus operations with a piezoelectric actuator for mobile phone camera applications. In order to achieve the desired frequency response of a piezoelectric actuator, the frequency of a multi-vibrator oscillator can be swept in various manners such as the frequency step and the number of transitions between frequency changes. A novel method using the resistor ladder circuit is incorporated for a bridge-driving signal generator whose frequency can be linearly swept and controlled according to the input digital code. The AFE chip is implemented in a 0.35-mum 1-poly 4-metal CMOS technology and runs at the single supply voltage of 2.8 V.

Radio-frequency energy-harvesting IC with DC-DC converter

This paper presents an energy harvesting system that uses a radio frequency (RF) signal. It consists of an RF voltage multiplier-rectifier and DC-DC converter. A Dickson voltage multiplier is used as the RF voltage rectifier. A buck-boost converter is used as the DC combiner. The input frequency of the RF signal is 2.4 GHz, and the output DC voltage is programmable. The proposed harvesting system is implemented in a 0.18-um CMOS process.

A voltage-mode DC-DC converter with enhanced transient responses

This paper presents the design technique using a charge-pump circuit for enhancing the transient responses of a voltage-mode DC-DC converter. Although there is no need for additional sensing circuitry for a voltage-mode DC-DC converter, extensive frequency compensation scheme should be critical for stable operations. This converter shows slow transient responses with respect to variations of input voltage and load current. In this paper, a charge-pump circuit is added to the compensating circuit for faster responses. The proposed method is verified in hardware implementation where the voltage-mode DC-DC buck converter is fabricated in a 0.35-um CMOS technology.

An active-RC filter with variable bandwidth and channel-selectivity characteristics

This paper presents the design of an active-RC filter with variable bandwidth and channel-selectivity characteristics for wireless communication applications. The topology of this filter is the 5th-order low pass type. The 3-dB bandwidth is programmable at 10, 20 and 40 MHz. The filter is fabricated in a 0.13-mum CMOS technology and dissipates 13.2 mW for a supply voltage of 1.2 V.

A DC-DC converter with adaptive clock control

In this paper, the DC-DC converter for adaptive clock control is presented. The proposed adaptive clock control scheme generates a leading edge blanking (LEB) time which is controlled by load current. The DC-DC converter achieves a high efficiency of more than 90% using supply voltages of 1.8 ~ 3.6V and load currents of 5 ~ 35mA.

A switched-capacitor filter with a slew rate enhancement technique

In this paper, a switched-capacitor filter with a slew rate enhancement circuit for wireless communication applications is designed. The type of the filter is chosen the 5th-order Elliptic lowpass filter to implement over 43dB of stopband attenuation at the 1.4 times frequency of passband. For direct conversion transceiver applications, the DC offset canceling circuit and programmable gain amplifier are included. The filter is fabricated in a 0.35-μm CMOS 2P4M technology. The power dissipation is 14.7mW for a single supply voltage of 3 V.

Design of analog front end for mobile fuel gauge applications

A high-resolution second-order integrating sigma-delta analog-to-digital converter (ADC) using double-sampled integrators is presented whitch performs two times faster sampling than conventional modulator. The modulator has been designed in a 0.18-um CMOS technology. It acheives a signal-to-noise and distortion ratio (SNDR) of 93.03 dB at a conversion rate of 64 sample/s. Power dissipation is 36μW for a single supply voltage of 2.0V. Active area of prototype ADC is 0.396μm2.