Kiichiro Tamaru

Considerations of the Performance of a Real-Time OS

In discussing performance of a real-time OS, we usually talk about the interrupt latency and the task switching time. But if you want to calculate the real-time performance of an application that uses the real-time OS as a kernel, these two parameters are not enough. Furthermore, the definition of the “task switching time” varies among available materials on real-time OS products, so that it is sometimes meaningless just to compare the values found in them.

Hierarchical design of a mu ITRON specification kernel: TR2

In designing the architecture of a realtime kernel, the problem of trading between functions and responses is always important. The authors describe the design approach of TR2 and show how they have solved the problem. TR2 is a realtime kernel for TX-series microprocessors based on the mu ITRON specification. TR2 employs a two-level hierarchical architecture. A basic kernel provides primitive constant-response functions, while an extension kernel provides various additional functions. TR2 executes these complex functions without locking dispatch. To provide useful programming elements, TR2 allows the complex functions to be requested in an interrupt handler. The complex functions are not executed immediately but deferred, and executed by a server task. With the architecture, TR2 assures constant responses for an interrupt handler and a task.<<ETX>>

A universal real-time kernel based on the mu ITRON specification

The growing variety of target processors complicates the design of applications. To reduce this complexity, a universal design environment is desired. As the first step in designing the hardware independent environment, the authors propose a universal real-time kernel specification for 8 to 32-bit microprocessors. The mu ITRON specification can be applied to various processors but to specify the universal specification, some decisions need to be made. The authors discuss the variations in the word length, trade-offs in hiding architectures, and other related issues. They then propose the universal specification based on the mu ITRON specification.<<ETX>>