Kisun Lee

Optimal design of the active droop control method for the transient response

Use of the active droop control method is a popular way to achieve adaptive voltage position (AVP) for the voltage regulator (VR). This paper discusses the small-signal model of the active droop control method, which is shown to be a two-loop feedback control system. The compensator design impacts both the current and voltage loops, making the design complicated. An optimal design method is proposed in order to achieve equal crossover frequencies for the two loops so that constant output impedance is realized in the VR. Simulation and experimental results prove the good VR transient response and high efficiency.

Adaptive voltage position design for voltage regulators

This paper proposes a general design guideline for the voltage regulator (VR) to achieve adaptive voltage position (AVP). All existing control methods are covered for different kinds of output filter capacitors. Based on the small-signal model analysis, the output impedance and system control bandwidth are discussed. Following the proposed design guidelines, simulation and experimental results demonstrate very good VR transient response.

Bandwidth Improvements for Peak-Current Controlled Voltage Regulators

To ensure the current sharing among the interleaved phases, the peak-current control is widely used in the voltage regulator (VR) applications. Meanwhile, to save the cost and footprint by reducing the output capacitance, high control bandwidths are mandatory. Because of the sample-hold effect in the peak-current loop, there exist stringent challenges to the high-bandwidth designs for VRs. In this paper, the influence from the sample-hold effect is investigated to clarify the difference between the VR and conventional applications. After that, two approaches for higher bandwidth are introduced. To decrease the phase delay due to the sample-hold related double poles, excessive external ramps are inserted to the modulators. To increase the effective sampling frequency, the phase inductor currents are coupled, either by the coupled-inductor structure or through the feedback control. In addition, a small-signal model including the sample-hold effect is derived for the coupled-inductor buck to explain the improvement. High-bandwidth designs are verified by the simulation and experimental results. A bandwidth of one-third switching frequency is demonstrated with a coupled-inductor VR.

A Hysteretic Control Method for Multiphase Voltage Regulator

Obtaining a faster dynamic response is a challenge for future microprocessor voltage regulators (VR). The hysteretic control method is one of the fastest control methods, but it is difficult to use in multiphase VRs because of the difficulty in achieving a constant switching frequency and interleaving operation among the phases. To resolve this, a hysteretic control method with a bandwidth-changing loop is proposed. By slowly adjusting the hysteretic bandwidth through the phase-locked loop, the duty cycle is synchronized with an external fixed-frequency clock reference. By phase-shifting this external clock reference for each phase, the interleaving among the paralleled phases can be easily implemented. On the other hand, slow hysteretic bandwidth changing will make this controller perform as though it has conventional hysteretic control during the transient for the fast dynamic response. After the transient, each phase will be pulled back to interleaving status through its bandwidth adjustment. Analysis and design guidelines for the proposed control are provided, and they are verified with hardware.

A novel control method for multiphase voltage regulators

This paper proposes a novel control method for the multiphase voltage regulators (VRs) to power the next generation of microprocessors. With a simple structure, this control can achieve multiphase current sharing, very fast transient response, and adaptive output voltage regulation. Simulation and experimental results show that the proposed control scheme significantly improves the performance, as compared with existing control methods.

Novel hysteretic control method for multiphase voltage regulators

The faster dynamic response is one of the big challenges for the future microprocessor voltage regulators (VR). The hysteretic control method is one of the fastest control methods but its hard to be used in multiphase VR because of the difficulty to achieve the constant switching frequency and the interleaving operation among the phases. To resolve this, the novel hysteretic control method is proposed. By slowly adjusting the hysteretic band width through the phase locked loop (PLL), the duty cycle is synchronized with an external fixed frequency clock reference. By phase shifting this external clock reference for each phase, the interleaving among the paralleled phases can be easily implemented. On the other hand, slow hysteretic band width changing will make this controller perform as the conventional hysteretic control during the transient for the fast dynamic response. After the transient, each phase will be pulled back to interleaving status through its band width adjustment. The analysis and design guide of the proposed control is provided and it is verified with the hardware.

High-bandwidth designs for voltage regulators with peak-current control

In the multiphase interleaving buck converters with peak-current control, the sample-hold effect limits the bandwidth of the voltage-regulation loop. For higher bandwidth and better transient performances, this paper presents two methods to reduce this limitation. To decrease the quality factor of the sample-hold related double poles, external ramps are inserted to the modulators. To increase the effective sampling frequency, the phase inductor currents are coupled, either through feedback control or by the coupled-inductor structure. In addition, a small-signal model including the sample-hold effect is derived for the coupled-inductor buck to explain the improvement. High-bandwidth designs are verified by the simulation and experimental results.

Analysis and Design of Adaptive Bus Voltage Positioning System for Two-Stage Voltage Regulators

For recent voltage regulators powering microprocessors, the amount of space they use is the most challenging issue. Moreover, efficient energy management depends not only on heavy-load efficiency but also on light-load efficiency. So far, to reduce the space taken near the microprocessor and to increase heavy-load efficiency, a two-stage voltage regulator has been proposed, and the adaptive bus voltage positioning (ABVP) control concept has been proposed to increase the light-load efficiency of the two-stage structure. In this paper, a ABVP control structure is proposed and is employed in the adaptive voltage positioning (AVP) system. For the proper design of this system, the system is modeled and analyzed, and the experimental results verify the analysis.

Adaptive Bus Voltage Positioning System for Two Stage Laptop Voltage Regulators

For the laptop voltage regulators, not only the heavy load efficiency, but also the light load efficiency is very important for thermal point and for the battery running time. So far, to increase the heavy load efficiency, the two stage structure is proposed and to increase the light load efficiency of this two stage voltage regulators, the adaptive bus voltage positioning (ABVP) control concept is proposed. In this paper, the ABVP control structure is proposed. For the proper design of this system, the small signal model is derived and the stability analysis is performed. And the simulation and experiment results verify this analysis.

Analysis and Design of the Dual Edge Controller for the Fast Transient Voltage Regulator

Achieving faster dynamic response is one of the big challenges for the future microprocessor voltage regulators (VR). It is well known that the system bandwidth needs to be higher to get a faster dynamic response but the system bandwidth is usually limited by the phase shift near the switching frequency. In this paper, the existing theories for this phase shift and efforts to achieve a faster transient response are summarized. A higher bandwidth design using a dual edge controller is analyzed. The bandwidth is designed to be larger than one half of the switching frequency. The design is then verified with the hardware.