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Klaus Nierle

Qimonda

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Publication

Featured researches published by Klaus Nierle.

Archive | 2007

Method and circuit for stressing upper level interconnects in semiconductor devices

Klaus Nierle; Koonhee Lee

Archive | 2007

System and method for addressing errors in a multiple-chip memory device

Koonhee Lee; Ryan Patterson; Hoon Ryu; Klaus Nierle

Archive | 2010

Apparatus and method for manufacturing a multiple-chip memory device with multi-stage testing

Koonhee Lee; Ryan Patterson; Hoon Ryu; Klaus Nierle

Archive | 2008

Method and System for Testing an Integrated Circuit

Joerg Kliewer; Klaus Nierle; Martin Versen

Archive | 2008

Integrated circuit i.e. memory chip, is tested in test operation mode by adjusting operating condition of voltage generator for producing load voltage for associated integrated load as function of external control signal

Martin Versen; Klaus Nierle; Jörg Kliewer

Archive | 2010

Apparatus and Method for Manufacturing a Multiple-Chip Memory Device

Koonhee Lee; Ryan Patterson; Hoon Ryu; Klaus Nierle

Archive | 2009

System und Verfahren zum Adressieren von Fehlern in einer Mehrchipspeichervorrichtung

Koonhee Lee; Ryan Patterson; Hoon Ryu; Klaus Nierle

Archive | 2008

Verfahren und Schaltung zum Belasten von Zwischenverbindungen auf oberer Ebene bei Halbleiterbauelementen

Klaus Nierle

Archive | 2008

METHOD AND APPARATUS FOR INCREASING CLOCK FREQUENCY AND DATA RATE FOR SEMICONDUCTOR DEVICES

Klaus Nierle; Koonhee Lee

Archive | 2008

Verfahren und Schaltung zur Belastung von Zwischenverbindungen auf hoher Ebene in Halbleiterbauelementen

Koonhee Lee; Klaus Nierle

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Collaboration

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Koonhee Lee

Qimonda

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Hoon Ryu

Qimonda

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Ryan Patterson

Qimonda

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Martin Versen

Qimonda

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Joerg Kliewer

Qimonda

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Jörg Kliewer

Qimonda

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