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Dive into the research topics where Kouhei Yamada is active.

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Featured researches published by Kouhei Yamada.


asia pacific conference on circuits and systems | 2006

A Frequency Compensation Technique for Variable Output Low Dropout Regulators

Akira Yamazaki; Kouhei Yamada; Satoshi Sugahara

A novel approach to implement low dropout (LDO) regulator for low equivalent series resistance (ESR) capacitive load is presented. The design utilizes internal Miller compensation circuit, which acts only for heavy load. The compensation circuit improves frequency response of the LDO without using zero generated by the ESR of the load capacitor or feedback network. The proposed circuit was fabricated and tested in 0.6mum CMOS process technology


asian solid state circuits conference | 2008

Low power consumption and high power density integrated DC-DC converter for portable equipments

Satoshi Sugahara; Kouhei Yamada; Masaharu Edo; Toshiro Sato; K. Yamasawa

We developed an integrated buck type DC-DC converter for portable electronic equipments. A newly developed pulse frequency modulation (PFM) control integrate circuits (1 Cs), which includes output power MOSFETs, achieved a low quiescent current below 14 muA and small chip size of 1.4 times 1.1 mm2 in 0.35 mum CMOS process. The integrated converter consisted of the PFM control 1Cs on a planar inductor and had a maximum efficiency of 90 % and a power density above 100 W/cm3.


IEICE Transactions on Communications | 2008

High Efficiency PWM Controlled Micro DC-DC Converter for Portable Electronic Equipments

Satoshi Sugahara; Kouhei Yamada; Tetsuya Kawashima; Masaharu Edo; Toshiro Sato; K. Yamasawa

In this paper, the characteristics of a micro DC-DC converter for portable electronic equipments are described. In the converter, an inductor, switching devices and control integrated circuits (ICs) were integrated. The external size of the converter module was 3.0 mm x 3.0mm × 1.0 mm. And the converter had a high efficiency of 83% at the input voltage of 7.2 V and the output voltage of 1.5 V. The miniaturization of the converter was achieved by developing a small inductor of the size of 3.0mm x 3.0 mm x 0.525 mm. High efficiency was achieved by adopting 0.6 μm CMOS process for ICs and switching devices, using N channel MOSFET for a high side power switch, and controlling a dead time adaptively. The efficiency characteristics of the converter were analyzed experimentally and theoretically. And the losses of the converter were theoretically analyzed.


IEEE Transactions on Power Electronics | 2013

90% High Efficiency and 100-W/cm

Satoshi Sugahara; Kouhei Yamada; Masaharu Edo; Toshiro Sato; K. Yamasawa


IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | 2004

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Kouhei Yamada


Archive | 2007

High Power Density Integrated DC - DC Converter for Cellular Phones

Satoshi Sugahara; Kouhei Yamada


Archive | 2008

Capacitance value free switched capacitor DC-DC voltage converter realizing arbitrary rational conversion ratio

Satoshi Sugahara; Kouhei Yamada


Archive | 2007

Control circuit of DC-DC converter and control method thereof

Satoshi Sugahara; Kouhei Yamada


Electrical Engineering in Japan | 2011

CONTROL CIRCUIT AND CONTROLLING METHOD OF SWITCHING POWER SUPPLY SYSTEM

Satoshi Sugahara; Kouhei Yamada; Haruhiko Nishio; Masaharu Edo; Toshiro Sato; K. Yamasawa


Archive | 2008

Control circuit of DC-DC converter with synchronous rectifier adjusting signal to improve efficiency at light loads and control method thereof

Satoshi Sugahara; Kouhei Yamada

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Nobuo Fujii

Tokyo Institute of Technology

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