Masaharu Edo
Shinshu University
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Publication
Featured researches published by Masaharu Edo.
power electronics specialists conference | 2000
Y. Katayama; Satoshi Sugahara; H. Nakazawa; Masaharu Edo
In this paper, we report the newly developed DC-DC converter IC termed monolithic DC-DC converter, in which a thin-film inductor and power IC are integrated, and describe the micro DC-DC converter module utilizing this IC. The thin-film inductor used in the monolithic DC-DC converter was fabricated by RF sputtering, photosensitive polyimide lithography and electro-plating onto the power IC. The micro DC-DC converter module using the monolithic DC-DC converter achieved power density of 5.6 W/cm/sup 3/ at output power of 1 W and maximum efficiency of 83.3% at switching frequency of 3 MHz.
IEEE Transactions on Magnetics | 2003
Zenchi Hayashi; Yasushi Katayama; Masaharu Edo; Haruhiko Nishio
In this paper, we present the performance of the micro DC-DC convertor CSM. We have developed this convertor with the configuration of Chip Size Module, consisting of a high speed PWM controller IC and an integrated soft ferrite as a solenoid type thin micro inductor.
ieee international magnetics conference | 2000
Haruo Nakazawa; Masaharu Edo; Yasushi Katayama; Masakazu Gekinozu; Satoshi Sugahara; Zenchi Hayashi; Kazuo Kuroki; Eiichi Yonezawa; Kazuo Matsuzaki
A 1 W class step-down micro-DC/DC converter that integrates a (4 mm/spl times/4 mm) planar inductor on a (4 mm/spl times/5 mm) power IC has been fabricated. The converter operation was stable at 3 MHz switching, achieving a power density of 5.6 W/cm/sup 3/ and a converter efficiency of approximately 80%.
power electronics specialists conference | 2004
Y. Katayama; Masaharu Edo; T. Denta; T. Kawashima; T. Ninomiya
In recent years, low output power CMOS DC-DC converters that integrate power stage MOSFETs and a PWM control circuit using CMOS process have been used in many mobile devices. In this paper, we propose the calculation method of CMOS DC-DC converter efficiency and report optimum design of CMOS DC-DC converter based on this method. By this method, converter efficiency can be directly calculated from converter specifications, dimensions of power stage MOSFETs and device parameters. Therefore, this method can be used for optimum design of CMOS DC-DC converter, such as dimensions of power stage MOSFET and switching frequency.
power electronics specialists conference | 1998
Satoshi Sugahara; Masaharu Edo; Toshiro Sato; K. Yamasawa
For an on-chip power-converter, a thin film reactor is fabricated on a silicon substrate and the optimum chip size is investigated to achieve a high efficiency when it is mounted in a buck converter. The optimum size for the efficiency of 85% is about 2.5 mm for a switching frequency of 1 MHz.
asian solid state circuits conference | 2008
Satoshi Sugahara; Kouhei Yamada; Masaharu Edo; Toshiro Sato; K. Yamasawa
We developed an integrated buck type DC-DC converter for portable electronic equipments. A newly developed pulse frequency modulation (PFM) control integrate circuits (1 Cs), which includes output power MOSFETs, achieved a low quiescent current below 14 muA and small chip size of 1.4 times 1.1 mm2 in 0.35 mum CMOS process. The integrated converter consisted of the PFM control 1Cs on a planar inductor and had a maximum efficiency of 90 % and a power density above 100 W/cm3.
IEICE Transactions on Communications | 2008
Satoshi Sugahara; Kouhei Yamada; Tetsuya Kawashima; Masaharu Edo; Toshiro Sato; K. Yamasawa
In this paper, the characteristics of a micro DC-DC converter for portable electronic equipments are described. In the converter, an inductor, switching devices and control integrated circuits (ICs) were integrated. The external size of the converter module was 3.0 mm x 3.0mm × 1.0 mm. And the converter had a high efficiency of 83% at the input voltage of 7.2 V and the output voltage of 1.5 V. The miniaturization of the converter was achieved by developing a small inductor of the size of 3.0mm x 3.0 mm x 0.525 mm. High efficiency was achieved by adopting 0.6 μm CMOS process for ICs and switching devices, using N channel MOSFET for a high side power switch, and controlling a dead time adaptively. The efficiency characteristics of the converter were analyzed experimentally and theoretically. And the losses of the converter were theoretically analyzed.
Archive | 2004
Masaharu Edo; Zenchi Hayashi
Archive | 2009
Masaharu Edo; 雅晴 江戸
Archive | 2004
Masaharu Edo; Haruhiko Nishio