Kozo Fujimoto

New Process of Self-Organized Interconnection in Packaging Using Conductive Adhesive with Low Melting Point Filler

A model experiment of the novel self-organized joining process using conductive adhesive with low melting point alloy was demonstrated to break through the limitation of conventional solders and adhesives used in electronics packaging. Basic properties of the adhesive paste, joint morphology, the formation of the conduction path, and the self-organization characteristics were examined. Melting fillers were preserved in their initial spherical form in resin without oxygen-reduction capability, although enlargement of the alloy domain occurred in the case of oxygen-reduction polymer. The formation of the conduction path could be controlled accurately by varying the resin performance and the process parameters such as the gap distance of the joint and the volume fraction of filler. Self-organization due to capillary wetting of melting alloy was observed on the copper-line-patterned glass-epoxy substrate. The pair of lines on the faced substrates was selectively interconnected with an alloy joint.

Dynamic modeling for resin self-alignment mechanism

Abstract A new self-alignment process using surface tension of resin material was developed to realize a low-temperature, fluxless, and cost-effective alternative alignment process for the future assembly of electronic and optoelectronic systems. In this new self-alignment process, we achieved self-alignment capability by using 3-dimensional pads to form the positioning boundary, and by mounting chips in the opposite direction. This process releases the force acted on liquid bumps, even when using resin material, which has been known not to possess self-alignment capability because of its low surface tension. As the viscosity of the resin material is considerably higher than that of the solders, the restoring force resulting from its low surface tension must be larger than the resistance force resulting from its high viscosity. In this paper, we propose a new passive alignment mechanism using the surface tension of a resin material and a comprehensive mathematical model in order to enhance understanding of the self-alignment behavior of resin. Moreover, we conducted a scaled-up experiment to calibrate and verify the models accuracy. It has been proved that resin self-alignment behavior is totally different from the oscillatory motion of solder alignment. This shows that the motion is aperiodic, regardless of the initial conditions of the system, such as an overdamped system due to the low surface tension and high viscosity characteristics of resin material.

Visual Inspection of Soldering Joints by Neural Network with Multi-angle View and Principal Component Analysis

With the development of microelectronics technology, the demands of the automatic inspection system are ever increasing. The current trends toward miniaturization of components, denser packing of boards, surface mounting technology, and highly automated assembly equipment make the task of inspecting these defects more critical and more difficult for humans. In this paper, we achieved 0% of misjudgment by implementing training category intermediate samples. We also achieved cutting down the processing time and an increase of correct judgments by the improvement of inputs using principle component analysis and multi-angle image.

Development of Au reflection film with high adhesion for high-density optical interconnection between LSI chips

We have developed a new multilayered reflection film structure containing Au for achieving slab waveguide based optical transmission interconnections between large-scale integration chips for next-generation high speed computers. The noble metals, especially Au, have outstanding characteristic as a high reflection film in a slab waveguide. However, when these metals are combined with optically transparent films of a SiO/sub 2/ system, there are severe problems with poor adhesion and poor thermal stability. In this work, we have solved these problems by inserting Cr films above and below the Au film resulting in the development of a new multilayered reflection film structure with superior reflectivity and adhesion characteristics.

An Efficient Thermal Design Method Based on Boundary Condition Modeling

Until recently, layout design methods for electronic devices such as large scale integration circuits (LSIs) have been considered strictly from the viewpoint of electrical circuit design. In the near future, however, electronic system design will also require thermal design as well. Current thermal layout design is treated as power distribution in electrical layout design. But, evaluation of thermal design is not power density. That is a temperature of the chip. In the process, the designer faces problems. Evaluation of temperature needs the thermal analysis. And, the thermal analysis is slower than electrical evaluation. This, in turn, accentuates the need to accelerate thermal analysis and design methods. We have been investigating a novel high-speed thermal management method for the upper-stream of electronic device layout design on modules when the designer is interested in narrowing down possible design solutions. This method has four features, i.e., 1) division of elements on modules by the boundary conditions, 2) high-speed thermal analysis (10-mus order), 3) division of design by inter-module boundary conditions to three design layers, and 4) automatic identification of regions in design space that satisfy the design constraints. As an illustration, we performed a layout design of a board with four device modules mounted on top with 16 design parameters. Our method achieves the very fast design time (150 s) with 4*105 analysis

Estimation of current path area during small scale resistance spot welding of bulk metallic glass to stainless steel

Abstract The current path area is a significant factor in estimating the temperature distribution via numerical modelling for resistance spot welding. This paper presents a method for the estimation of the current path area at the faying surface during small scale resistance spot welding between bulk metallic glass and stainless steel. Observation of cross-sections and fracture surfaces reveals the welding process at the faying surface for both dissimilar and similar welding. The equipotential surface that depends on the difference between the contact area of the electrode-to-sheet and sheet-to-sheet interfaces is estimated by numerical modelling. The current path area at the faying surface is estimated by measuring the electric potential between the sheets, taking into account the current distribution.

Bonding of copper to silicon chips using vapor-deposited tin film

A bonding process between a Cu plate and a Si chip using a vapor-deposited tin film has been developed. The microstructures of the bond interface and the reliability during thermal cyclic tests were investigated. Intermetallic compounds (IMCs) of Cu3Sn and/or Au- Cu-Sn were formed at the bond interface. The stress concentration initiated fracture in the IMC layer at the corners of the bond area and the initial cracks in the IMC layer propagated through the Al layer in the metallized layer on the Si chip. Joints using a deposited tin film showed much longer lifetime than solder joints.

Numerical Analysis of Self-Organizing Interconnection Process by 3 Dimensional Flow Dynamics

The growing importance of high integration on electronics demands novel interconnection methods replacing high-cost solder bumping or less reliable conductive adhesives. Self-organizing interconnection process using resin containing solder fillers has a possibility to achieve high-density joints satisfying both needs. Numerical study visualized the process and revealed that surface tension of molten fillers and resin viscosity determine the speed of conductive path formation.

Effects of bonding conditions and surface state on bondability: Study of Cu wire stitch bonding (1st Report)

Summary In mass production of semiconductors, wire bonding is used to make electrical connections between an electrode terminal on a semiconductor chip and an outer lead terminal. Cu wire offers good corrosion resistance and high electrical and thermal conductivity. Cu wire can also be directly bonded to Cu alloy lead frames by stitch bonding. For this reason, practical application of the Cu wire bonding process is anticipated. Cu wire stitch bonding on Cu alloy lead frames, however, faces numerous difficult problems. This paper describes an investigation of the effects of the bonding conditions and surface states on bondability during Cu wire stitch bonding. It is necessary to exercise good control of the wire deformation behaviour to obtain good bondability in thermosonic Cu wire bonding (hot‐pressure bonding combined with ultrasonic vibration). The surface state of the Cu alloy lead also affects the bondability. If the surface roughness of the Cu alloy lead is more than 0.4 μm or if the thickness of th...

Effects of Material Property and Structural Design on the Stress Reduction of the Joints in Electronics Devices

Electronics devices consist of silicon chips, copper leads, substrates and other parts which are jointed to each other with solder, conductive adhesive or other materials. Each coefficient of thermal expansion is different and it causes strain concentrations and cracks. We analytically investigated the stress reduction structure at the edge of the joints such as Sn-Ag-Cu solder or Cu/Sn alloy between the silicon chip and copper lead. At first, we examined the influence of the joint thickness and fillet at the joint edge on the stress. In the joint without fillet, the stress at the end of the joint increased depending on the thickness of the joint. The fillet of the joint increased the stress of the Cu/Sn alloy joint and the stress was increased depending on the thickness, though the fillet decreased the stress of the solder joint. We suggested the copper lead with slits to reduce the force of constraint. We compared the effects of the structure parameters of the slits on the stress reduction. The height was a more effective parameter than the width and the pitch. In the case of solder joint, the slits of the copper lead reduce the stress more effective in the thick joint than the thin joint. However, in the case of Cu3Sn joints, the slits reduced the stress more effectively in the thin joint than thick joint.