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Dive into the research topics where Krishna Srinivasan is active.

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Featured researches published by Krishna Srinivasan.


IEEE Transactions on Advanced Packaging | 2009

Transient Chip-Package Cosimulation of Multiscale Structures Using the Laguerre-FDTD Scheme

Myunghyun Ha; Krishna Srinivasan; Madhavan Swaminathan

Transient simulation using Laguerre polynomials is unconditionally stable and is ideally suited for modeling structures containing both small and large feature sizes. The focus of this paper is on the automation of this technique and its application to chip-package cosimulation. Laguerre finite-difference time-domain (FDTD) requires using the right number of basis coefficients to generate accurate time-domain waveforms. A method for generating the optimal number of basis functions is presented in this paper. Equivalent circuit models of the FDTD grid have been developed. In addition, a method for simulation over a long time period is also presented that enables the extraction of the frequency response both at low and high frequencies. A node numbering scheme in the circuit model of the FDTD grid that is suitable for implementation has been discussed. Results from a chip-package example that shows the scalability of this technique to solve multiscale problems have been presented.


IEEE Transactions on Advanced Packaging | 2008

Improvements in Noise Suppression for I/O Circuits Using Embedded Planar Capacitors

Prathap Muthana; Krishna Srinivasan; Arif Ege Engin; Madhavan Swaminathan; Rao Tummala; Venkatesh Sundaram; Boyd Wiedenman; Daniel Irwin Amey; Karl Hartmann Dietz; Sounak Banerji

The performance of embedded planar capacitors in noise suppression of input/output (I/O) circuits and improvements in board impedance profile have been investigated in this paper. Simultaneous switching noise (SSN) is a critical issue in todays systems and this paper shows performance improvements by introducing thin planar embedded capacitors in the board stack up. Measurement and modeling results by including the effects of transmission lines and the power ground plane pairs in the board stack up in the gigahertz range quantify the performance of the embedded capacitors.


IEEE Transactions on Advanced Packaging | 2007

Near-Field and Far-Field Analyses of Alternating Impedance Electromagnetic Bandgap (AI-EBG) Structure for Mixed-Signal Applications

Jinwoo Choi; Dong Gun Kam; Daehyun Chung; Krishna Srinivasan; Vinu Govind; Joungho Kim; Madhavan Swaminathan

This paper presents near-field (NF) and far-field (FF) analysis of alternating impedance electromagnetic bandgap (AI-EBG) structure in packages and boards. Three test vehicles have been designed and fabricated for NF and FF measurements. Simulation results using a full-wave solver (SONNET) have been compared with measurement results. This paper investigates the radiation due to return current on different reference planes. The analysis results from simulations and measurements provide important guidelines for design of the AI-EBG structure based power distribution network for noise isolation and suppression in mixed-signal systems


IEEE Transactions on Advanced Packaging | 2007

Causality Enforcement in Transient Co-Simulation of Signal and Power Delivery Networks

Rohan Mandrekar; Krishna Srinivasan; Ege Engin; Madhavan Swminathan

This paper discusses a transient simulation method that co-simulates the signal and power delivery networks in a packaged system. The method includes a novel delay extraction technique that enables the enforcement of causality conditions on the resulting transient waveforms. This paper describes the application of the method on a number of test cases to account for electromagnetic parasitics and cross-talk, and shows the scalability of the method for performing large sized transient simulations


international symposium on quality electronic design | 2006

Enhancement of Signal Integrity and Power Integrity with Embedded Capacitors in High-Speed Packages

Krishna Srinivasan; Prathap Muthana; Rohan Mandrekar; Ege Engin; Jinwoo Choi; Madhavan Swaminathan

Improvements in electrical performance of microelectronic systems can be achieved by the integration of passive elements such as capacitors, resistors and inductors. The advantage of embedded passives is their low parasitic values. In this paper, enhancement of signal-integrity and power-integrity is investigated when a high-k planar capacitor is used as a power-ground plane, with embedded high-k discrete capacitors that have low ESI and ESR values as decoupling capacitors for SSN suppression. In order to capture the effects of embedded capacitor performance, a test-structure involving many signal-lines referenced to a power-ground plane was simulated. Simulation results show that the high-k planar capacitor reduces coupling of noise currents through the power-ground planes and helps improve the eye-opening. Simulation results have been quantified for a case, where a fewer number of embedded discrete capacitors helps reduce SSN more significantly than surface-mounts. Transient co-simulation of the signal delivery network (SDN) and the power-delivery network (PDN) are performed using Y-parameters


design automation conference | 2006

System level signal and power integrity analysis methodology for system-in-package applications

Rohan Mandrekar; Krishna Bharath; Krishna Srinivasan; Ege Engin; Madhavan Swaminathan

This paper describes a methodology for performing system level signal and power integrity analyses of SiP-based systems. The paper briefly outlines some new modeling and simulation techniques that have been developed to enable the proposed methodology. Some results based on the application of this methodology on test systems are also presented


electrical performance of electronic packaging | 2005

Near field and far field analysis of alternating impedance electromagnetic bandgap (AI-EBG) structure for mixed-signal applications

Jinwoo Choi; Dong Gun Kam; Daehyun Chung; Krishna Srinivasan; Vinu Govind; Joungho Kim; Madhavan Swaminathan

This paper presents near field (NF) and far field (FF) analysis of alternating impedance electromagnetic bandgap (AI-EBG) structure in package and board. Three test vehicles have been designed and fabricated for near field and far field measurements. Simulation results using a full wave solver (SONNET/spl trade/) have been compared with measurement results. This paper investigates the radiation due to return current on different reference planes. The analysis results from simulations and measurements provide important guidelines for design of the AI-EBG structure for noise reduction in mixed-signal systems.


electronic components and technology conference | 2004

Electromagnetic interference (EMI) issues for mixed-signal system-on-package (SOP)

Hideki Sasaki; Vinu Govind; Krishna Srinivasan; Sidharth Dalmia; Venky Sundaram; Madhavan Swaminathan; Rao Tummala

Electromagnetic interference (EMI) issues in implementing a mixed-signal system-on-package (SOP) are investigated. Each of the testbeds utilized in our experimentations consists of a digital circuit and a RF front-end circuit with embedded passives, but they vary in terms of the route of the digital trace. With these testbeds, we demonstrate two different EMI mechanisms. The first results in EMI due to capacitive coupling through a small slot and intermodulation between the digital and RF signals. Even when the frequency of the digital signal is much lower than that of the RF signal, this mechanism causes new harmonics of the digital signal to appear around the frequency of the RF signal. The second mechanism produces EMI due to coupling through the common power bus in the package. To prevent such EMI issues, we describe differential signaling of the digital interface as our future work. Our results indicate the correct direction for EMI design in developing mixed-signal SOP.


international symposium on electromagnetic compatibility | 2006

Modeling of multilayered packages and boards using modal decomposition and finite difference methods

Arif Ege Engin; Krishna Bharath; Krishna Srinivasan; Madhavan Swaminathan

Simultaneous switching noise (SSN) is a major signal integrity (SI) and electromagnetic interference (EMI) problem. SSN involves the interaction between the power/ground planes and the transmission lines. Through the power/ground planes, there can be noise coupling not only in the transversal direction between two planes, but also vertically from one plane pair to another through the apertures and via holes. In addition, transmission lines can excite the planes at return path disconti- nuities. Due to the large size of systems packaging, it is difficult to analyze such problems using full-wave simulators. We present an accurate and efficient modeling approach based on the finite difference method (FDM). Power/ground planes are modeled using FDM, while the transmission lines are incorporated using a modal decomposition method.


international microwave symposium | 2007

Overcoming Limitations of Laguerre-FDTD for Fast Time-domain EM Simulation

Krishna Srinivasan; Madhavan Swaminathan; Ege Engin

Laguerre-FDTD is an unconditionally stable finite-difference time-domain (FDTD) scheme that uses Laguerre polynomials for transient simulation. Laguerre-FDTD has been shown to be significantly faster than conventional FDTD scheme. However, prior work on Laguerre-FDTD for EM simulation has the limitation of being able to simulate only for a certain time-duration and can only be applied to structures where fields decay to zero within a certain time-duration. In this paper, a solution has been proposed to overcome these limitations, so that transient EM simulation can be done accurately for all time and for all types of structures. An EM test-case in 2D has been presented to illustrate the extended Laguerre-FDTD method.

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Ege Engin

Georgia Institute of Technology

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Rohan Mandrekar

Georgia Institute of Technology

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Prathap Muthana

Georgia Institute of Technology

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Rao Tummala

Georgia Institute of Technology

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Arif Ege Engin

Georgia Institute of Technology

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Myunghyun Ha

Georgia Institute of Technology

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Vinu Govind

Georgia Institute of Technology

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