Kristina Georgoulakis

Electronic dispersion compensation of fiber links using sparsity induced volterra equalizers

During the last few years, a lot of research has been invested for the development of electronic devices equipped with advanced signal processing techniques for the dispersion compensation of Optical transmission systems. Compared to their all-optical counterparts, electronic compensation increases flexibility and gives a new impetus to transparent optical networks for adaptive and dynamic handling in cases where the total accumulated dispersion is not known in advance. In this paper, the Sparse Learning via Iterative Minimization (SLIM) algorithm is employed for the design of reduced size Volterra Decision Feedback (VDFE) equalizers in the context of optical communications is considered. The equalizer structure is dynamically tuned discarding coefficients that have a marginal contribution to the performance of the equalizer leading to both enhanced convergence speed and significant computational complexity savings.

Performance evaluation of decision feedback equalizers in fiber communication links

In this paper, the performance of the conventional Decision Feedback (DFE) equalizer as well as the Volterra DFE is investigated in the context of intensity modulated direct detection optical communications links, when non-return to zero on-off keyed (NRZ-OOK) and optical differential encoded phase shift keyed (NRZ-DPSK) transmission is employed. The DFE is used to mitigate either the residual chromatic dispersion resulting from the incomplete optical compensation or the accumulated chromatic dispersion resulting from uncompensated optical transmission. To facilitate realtime implementation, the equalizer structure is dynamically configured discarding coefficients that have a marginal contribution to the performance of the equalizer leading to a significant computational complexity savings.

Cost-effective adaptive optical network technologies for Metropolitan Area Networks

Improving the performance of electronic and optoelectronic components and systems has enabled the investigation of transmitting optical channels with data rates greater than 40 Gb/s. However, for transporting high capacity channels on demand over long distances, considerable signal processing is necessary, with current emphasis being on digital techniques. Meanwhile in the context of optical networks where spectrally adjacent channels may have crossed different routes to interconnect the same source destination nodes, adaptive transmission systems become vital. This paper will study adaptive optical and electronic network technologies that enable transmission of high capacity channels with emphasis to the interplay between realistic performance, feasibility and complexity/cost.

40 Gb/s FPGA implementation of a reduced complexity volterra DFE for DQPSK optical links

A low complexity MIMO Volterra Decision Feedback Equalizers (VDFE) for optical transmission systems employing NRZ-DQPSK signalling is proposed. Based on a comparative study performed by means of simulations, it is proved that the proposed equalizers maintain the required efficiency in terms of BER, achieving significant reduction in terms of complexity. Also, suitable architectures for high-speed FPGA implementations are presented. A 8-input 2-output low complexity VDFE involving three taps feed-forward filtering and two taps backward filtering was implemented on a single state-of-the-art FPGA. The target rate of 40 Gb/s is achieved by applying extensive pipelining and parallelism and fully exploiting specific FPGA features.

FPGA implementation of a MIMO DFE IN 40 GB/S DQPSK optical links

In this paper, an FPGA implementation of a Multi Input Multi Output (MIMO) Decision Feedback equalizer (DFE) is proposed, for the electronic compensation of the impairments in 40Gb/s Intensity Modulated Direct Detection (IM/DD) optical communication links employing NRZ DQPSK signaling. The proposed equalizer is used for the electronic compensation the residual Chromatic Dispersion (CD) along the installed optically compensated optical paths. The required processing rate is achieved by applying intensive pipelining and parallelism in the original architecture of the equalizer. At the given processing rate, a 8-input 2-output DFE involving three taps feedforward filtering and two taps backward filtering is implemented on a single, cutting edge technology, Xilinx FPGA device.

Fractionally Spaced Clustering Based Equalizer for Optical Channels

A Fractionally-Spaced Clustering Based Equalizer is proposed for the electronic equalization of optical channels. Equalization is treated as a classification task. The proposed approach outperforms the recursive Volterra DFE, as it is demonstrated by simulation.

Performance evaluation of the clustering based sequence equalizer in direct detection optical communication links

In this paper the performance of the Clustering Based Sequence Equalizer is investigated in the context of Intensity Modulated Direct Detection optical communications links operating at 10Gb/s, when non-return to zero on-off keyed and optical differential encoded phase shift keyed transmission is employed. The aforementioned equalizer provides an attractive implementation of the Maximum Likelihood Sequence Estimation, comprising of two successive steps, namely a) nonparametric estimation of the channel response using a cluster based approach and b) sequence estimation using the Viterbi algorithm. The performance of the cluster based equalizer in fiber links is investigated my means of computer simulation.

FPGA implementation of an MLSE equalizer in 10Gb/s optical links

In this paper, an FPGA implementation of a Maximum Likelihood Sequence Estimator (MLSE) is proposed, in the context of Intensity Modulated Direct Detection optical communications links operating at 10Gb/s, when non-return to zero on-off keyed transmission is employed. A forward processing, sliding window systolic architecture is adopted for the implementation of the Viterbi algorithm (VA), used for the efficient computation of the sequence detection in the MLSE approach. The proposed VA architecture is implemented using synthesisable VHDL code. VA decoders of up to 32 states operating at the rate of 10Gb/s can be accommodated, when the targeted hardware is the Xilinx Virtex 7 XC7VX690T-2 FPGA chip. A peak processing rate of 56Gb/s is achieved for a 4 states VA decoder.

Adaptive channel identification in optical fiber communication systems

In this paper, adaptive methods for the identification of the channel response of optical fiber communications links are considered, in the context of intensity modulated direct detection on/off keying transmission. A discrete time, second order Volterra kernel is used for the modeling of the overall channel response. The Volterra parameters are estimated on the basis of the available input/output data, by resorting to adaptive system identification techniques. The performance of the adaptive processing algorithms is evaluated in terms of the achieved minimum estimation error, the rate of the convergence and the required computational complexity. It is demonstrated, by means of computer simulation, that the use of low cost adaptive processing algorithms, properly tailored to the problem at hand, can provide a reliable solution, without sacrificing much of the performance.

Clustering Based Sequence Equalizer in Direct Detection DQPSK optical signaling

In this paper, a Clustering Based Sequence Equalizer is proposed in the context of Intensity Modulated Direct Detection optical communications links operating at 40Gb/s using Differential Quadrature Phase-Shift Keying signaling. The equalizer provides an attractive implementation of the Maximum Likelihood Sequence Estimation, comprising of two successive steps, namely a) nonparametric estimation of the channel response using a cluster based approach and b) sequence estimation using the Viterbi algorithm. The performance of the cluster based sequence equalizer is investigated my means of computer simulation.