Kuan-Po Lin

Investigation of temperature-dependent characteristics of an n/sup +/-InGaAs/n-GaAs composite doped channel HFET

The temperature-dependent characteristics of an n+-InGaAs/n-GaAs composite doped channel (CDC) heterostructure field-effect transistor (HFET) have been studied. Due to the reduction of leakage current and good carrier confinement in the n+-InGaAs/n-GaAs CDC structure, the degradation of device performances with increasing the temperature is insignificant. Experimentally, for a 1 x 100 μm2 device, the gate-drain breakdown voltage of 24.5 (22.0) V, turn-on voltage of 2.05 (1.70) V, off-state drain-source breakdown voltage of 24.4 (18.7) V, transconductance of 161 (138) mS/mm, output conductance of 0.60 (0.60) mS/mm, and voltage gain of 268 (230) are obtained at 300 (450) K, respectively. The shift of Vth from 300 to 450 K is only 13 mV. In addition, the studied device also shows good microwave performances with flat and wide operation regime.

On the InGaP/GaAs/InGaAs camel-like FET for high-breakdown, low-leakage, and high-temperature operations

A new field-effect transistor using a high-barrier n/sup +/ -GaAs/p/sup +/-InGaP/n-GaAs camel-like gate and GaAs/InGaAs heterostructure-channel has been fabricated successfully and demonstrated. Experimentally, an ultra high gate-drain breakdown voltage of 52 V, a high drain-source operation voltage over 20 V with low leakage currents, and a high drain-source off-state breakdown voltage of 39.7 V are obtained for a 1/spl times/100 /spl mu/m/sup 2/ device. The high breakdown behavior is attributed to the use of high barrier camel-like gate and heterostructure channels to reduce the undesired leakage current. Furthermore, the studied device also shows high breakdown behavior in a high temperature environment and good microwave characteristics. Therefore, based on these characteristics, the studied device is suitable for high-breakdown, low-leakage, and high-temperature applications.

Characteristics and comparison of In0.49Ga0.51P/InGaAs single and double delta-doped pseudomorphic high electron mobility transistors

Abstract The InGaP/InGaAs single and double delta-doped pseudomorphic high electron mobility transistor (δ-PHEMT) grown by low-pressure metal organic chemical vapor deposition have been fabricated and investigated. Based on the employment of the wide-gap InGaP Schottky layer and delta-doped carrier supplier, the high breakdown voltages together with good device characteristics are obtained simultaneously. Furthermore, the newly designed V-shaped InGaAs channel can enhance the carrier confinement effect and increase the product of carrier concentration and mobility. Experimentally, for 1×100 μm 2 devices, the gate-to-drain breakdown voltages larger than 40 (30) V, the transconductances of 90 (201) mS/mm, and the maximum current densities of 646 (846) mA/mm are achieved for the studied single and double δ-PHEMT, respectively. Meanwhile, the measured fT and fmax are 12 (16) and 28.4 (34) GHz, respectively.

Improved n+-GaAs/p+-In0.49Ga0.51P/n-GaAs camel-like gate structure for high-breakdown, low-leakage, and high-temperature applications

A n+-GaAs/p+-In0.49Ga0.51P/n-GaAs camel-like gate structure has been applied to fabricate high-performance transistors. The studied heterostructure field-effect transistor exhibits a large barrier height, high breakdown voltage, low leakage current, and good temperature-dependent characteristics. Experimentally, for a 1×100 μm2 device, the gate-drain breakdown voltage and gate leakage current are 52 (31.5) V, and 37 μ A/mm (3.5 mA/mm) at the gate-drain voltage of 40 V, respectively, at the temperature of 300 (480) K. In addition, the high drain-source operation voltage over 20 V with low leakage current is obtained.

Study of InGaP/GaAs/InGaAs high-barrier gate and heterostructure-channel field-effect transistors

A heterostructure field-effect transistor with an n+-GaAs/p+-InGaP/n-GaAs high-barrier gate and n-GaAs/i-InGaAs/i-GaAs/delta-doped sheet heterostructure channel (device A) has been successfully fabricated and studied. The heavily doped p+-InGaP layer and heterostructure channel are introduced to increase the barrier height and carrier confinement, respectively. Experimentally, the device without the high-barrier gate structure (device B) is also fabricated for comparison to investigate the influence of high-barrier gate structure on device characteristics. Due to the high-barrier gate added to suppress the tunneling current in device A, the gate leakage current is also substantially reduced. Therefore, the turn-on voltage, breakdown voltage, current drivability, and transconductance linearity are all significantly improved for device A relative to device B. Furthermore, the temperature-dependent characteristics of device A are also improved.

Study of a high-barrier-gate pseudomorphic transistor with a step-compositioned channel and bottomside delta-doped sheet structure

A newly designed high-barrier-gate Ga0.51In0.49P/InxGa1-xAs/GaAs pseudomorphic transistor with a step-compositioned channel (SC2) and bottomside delta-doped sheet (BD2S) structure has been fabricated successfully and studied. For a 1×100 µm2 studied device, a high gate-to-drain breakdown voltage over 30 V is found. In addition, an available output current density up to 826 mA mm-1 at a high gate voltage of 2.5 V, a maximum transconductance of 201 mS mm-1 with a very broad transconductance operation regime of 3 V of gate bias (565 mA mm-1 of drain current density) and a high dc gain ratio of 575 are obtained, simultaneously. Meanwhile, the maximum values of the unity current-gain cut-off frequency fT and oscillation frequency fmax are 16 and 34 GHz, respectively.

An inverted delta-doped V-shaped InGaP/In/sub x/Ga/sub 1-x/As pseudomorphic high electron mobility transistor

We have presented a high-performance InGaP/In/sub x/Ga/sub 1-x/As pseudomorphic high electron mobility transistor (PHEMT) in this work. Due to the presence of inverted delta-doped V-shaped InGaP/In/sub x/Ga/sub 1-x/As structure, the good carrier confinement together with high-breakdown voltage and a flat and wide transconductance operation regime are expected. Experimentally, the fabricated device (1/spl times/100 /spl mu/m/sup 2/) shows a high gate-to-drain breakdown voltage of 30 V and a high output drain saturation current density of 826 mA/mm at V/sub GS/=2.5 V. The high transconductance expands over a very broad operation range with the maximum value of 201 mS/mm. Meanwhile, the studied device exhibits a good microwave frequency linearity.

Temperature-dependent characteristics of InP/In/sub 0.53/Ga/sub 0.34/Al/sub 0.13/As heterojunction bipolar transistor

Temperature-dependent DC performances of InP/InGaAlAs heterojunction bipolar transistors (HBTs) using the InGaAlAs quaternary alloy as the base and collector layers are studied and reported. When compared with conventional InP/InGaAs HBTs, the device studied exhibits a higher common-emitter breakdown voltage and a lower output conductance even at high temperature. In addition, with decreasing temperature from 25 toward -196/spl deg/C, an irregular temperature behavior of current gain has been investigated.

High-performance n/sup +/-GaAs/p/sup +/-In/sub 0.49/Ga/sub 0.51/P/n-GaAs high-barrier gate heterostructure field-effect transistor

A new heterostructure field-effect transistor (HFET) using an n/sup +/-GaAs/p/sup +/-In/sub 0.49/Ga/sub 0.51/P/n-GaAs high-barrier-gate structure has been fabricated successfully and demonstrated. The heavily doped p/sup +/-In/sub 0.49/Ga/sub 0.51/P layer is introduced to increase the barrier height and to suppress the tunneling current. Therefore, the leakage current is reduced and breakdown voltage is improved substantially. Experimentally, for a 1/spl times/100 /spl mu/m/sup 2/ device, a high gate-drain breakdown voltage of 52 V and high drain-source operation voltage of 20 V with low leakage current are obtained. The high breakdown characteristics of the studied device indicate that devices with n/sup +/-GaAs/p/sup +/-In/sub 0.49/Ga/sub 0.51/P/n-GaAs high-barrier-gate structure are suitable for high-power circuit applications.

InP/InGaAs heterojunction bipolar transistors with superlattice emitter structure

A heterojunction bipolar transistor with superlattice emitter structure based on InP/InGaAs material system has been demonstrated. Two devices with different period of superlattice and emitter thickness were proposed. By introducing the superlattice into the emitter, the confinement of holes is enhanced. Experimentally, for higher periods of superlattice, the current gain is enhanced and more stable temperature-dependent characteristics are observed. The common-emitter current gains up to 170 and 54 are obtained for the studied devices with emitter thickness of 800/spl Aring/ and 150/spl Aring/, respectively.