Kun-Yi Lin

A 1V fully differential CMOS LNA for 2.4GHz application

In this paper, we present a low voltage CMOS Low Noise Amplifier (LNA) for 2.4GHz application. A folded cascode structure has been used to lower the supply voltage. The proposed circuit has been simulate by using the tsmc 0.18/spl mu/m CMOS process with RF model. When the supply voltage is 1V, the power consumption of the proposed circuit is 9.8mW. At 2.4GHz, the noise figure (NF) is 3.22dB, and the power gain is 15dB.

A 1.5 V 2.4 GHz CMOS mixer with high linearity

An RF mixer with high linearity for 2.4 GHz ISM band applications is presented. The mixer is composed of a modified class-AB transconductor stage and a common mode feedback (CMFB) circuitry. With this topology the following simulation results are achieved: input 1-dB compression point (P-1dB) -8.98 dBm, input third-order intercept point (IIP3) 5.46 dBm, power conversion gain 3.3 dB, and single side-band noise figure 14.87 dB. The mixer implemented by tsmc 0.18 mum CMOS process consumes 3.73 mA of current from a 1.5 V power supply

A 2 V 2.4 GHz fully integrated CMOS LNA

A fully integrated 2 V 2.4 GHz ISM (Industrial Scientific and Medical) frequency band LNA (Low Noise amplifier) is proposed. The LNA is designed with 0.3 /spl mu/m process. The noise figure including the resistance of inductors has been considered. An inductor is added between the MOS of cascode circuits to improve the matching and increase power gain. With a 2 V supply, the LNA achieves a power gain (S21) of 19.9 dB, noise figure of 2.5 dB, and power dissipation 14.7 mW. Also, the input third-order intercept point (IIP3) is 2 dBm, and an input 1-dB compression point (P/sub 1 dB/) is -12 dBm. The reverse isolation is -47.8 dB.

A 1.5 V high-linearity CMOS mixer for 2.4 GHz applications

A folded-cascode mixer with a modified class-AB transconductor for 2.4 GHz ISM band applications is presented in this paper. The mixer is composed of a modified class-AB transconductor and a low-voltage design technique. The proposed architecture improves the performance of linearity in the RF front-end. Simulation results for the proposed mixer using TSMC 0.8 /spl mu/m mixed signal CMOS process are: input 1-dB compression point (P -1dB) -1.15 dBm, input third-order intercept point (IIP3) 11 dBm, power conversion gain 1 dB, and single side-band noise figure 17.3 dB. The mixer consumes 5.86 mA of current from a 1.5 V power supply.

A 2 V 2.4 GHz fully integrated CMOS LNA with Q-enhancement circuit

A 2 V 2.4 GHz ISM (Industrial Scientific and Medical) frequency band LNA (Low Noise Amplifier) with negative resistance is proposed. The LNA is designed with 0.35 /spl mu/m process. The noise figure including the resistance of inductors has been considered. An inductor is added between the MOS of cascode circuits to improve the matching and increase power gain. Using negative resistance reduces output parasitic resistance of spiral inductor.

A 0.6V CMOS low noise amplifier for 2.4GHz application

A low voltage CMOS low noise amplifier (LNA) for 2.4GHz application is presented in this paper. A folded cascode structure is employed to reduce the supply voltage. The supply voltage is only 0.6V. The proposed circuit is simulated by Agilent ADS with tsmc 0.18mum RF model. At 2.4GHz, the noise figure (NF) is 1.56dB and the power gain is 13.8dB

A Low-power Tunable Bandpass Amplifier for RF Applications

A bandpass amplifier with enhanced image rejection for radio frequency (RF) applications is presented. The proposed amplifier using MOS varactors and active inductors is designed for both 2.4GHz bandpass and 2.8GHz image-rejection notch filtering. With active inductors and MOS varactors, this amplifier needs no passive devices. With 2V supply voltage, the circuit exhibits gain of 20dB and image-rejection of 86dB. The tuning range of the image frequency is from 2.8 GHz to 2.87GHz with power dissipation of 3.2mW

A 1.5 V high gain CMOS mixer for 2.4-GHz applications

This paper describes a 1.5-V 2.4-GHz silicon down conversion mixer with a CMOS g/sub m/ Cell using 0.35 um process. With a 2.3-GHz local oscillator (LO) and a 2.4-GHz RF input, the mixer minimum double sideband noise figure (DSB NF) is 8.9 dB. The input third order intercept point (IIP3) is -0.1 dBm and the power conversion gain is 26.6 dB.

A 1V 2.4GHz CMOS power amplifier with integrated diode linearizer

A low voltage CMOS power amplifier with integrated diode linearization technique is proposed. It is designed for 2.4 GHz Bluetooth applications. The power amplifier is simulated with UMC 0.18/spl mu/m CMOS technology. Under 1V supply voltage, PA can deliver 20 dBm output power with 51% power-added-efficiency. At 2.4 GHz, the reverse isolation coefficient S12 is -27.5 dB.