Kunihiko Nakamura
Panasonic
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by Kunihiko Nakamura.
Proceedings of SPIE | 2000
Narito Shibaike; Hiroyuki Takeuchi; Kunihiko Nakamura; Norisato Shimizu
A micro-reducer characterized in its small size, high resolution ration and high reliability has been developed to achieve sufficient performance after 5,000,000 high-speed rotations1. A 3K-type mechanical paradox planetary gear reduction system was chosen in mechanical design. The size of a reducing part is 3 x 3.8 x 1.3 mm, and its reduction ratio is about 200. The module of the fine gears is 0.03. Alloy tool steel and WC-Ni-Cr super hard alloy were selected for the materials. The mechanical, thermal and environmental attributes were investigated by the properties of the materials suitable for micro fabrication on the specific strength and resistance to thermal distortion as the functional performance, and energy content of the material as the environmental impact. Micro-EDM process was optimized to accurately shape such a microscopic components. Surface modification by DLC, CrN, and MoS+-2) thin film was applied by rotating deposition technique to improve the surface-based attributes such as hardness, friction coefficient and resistance to wear. Several kinds of lubrication and bearing systems were evaluated to understand their internal energy dissipation and durability. This report presents such a synthetic approach for the micro-reducer to be steady, efficient and durable.
Journal of Micromechanics and Microengineering | 2010
Yasuyuki Naito; Kunihiko Nakamura; Keiji Onishi
Radio frequency micro-electro-mechanical system (RF-MEMS) switching devices using vertical comb-drive actuation toward low-voltage actuation, fast response are presented in this paper. The switching devices, which comprise comb-drive electrodes, are actuated entirely by the electrostatic forces applied not only for the down-state but also for the up-state. The cost-effective MEMS process compatible with the complementary metal oxide semiconductor (CMOS) process is presented in this paper as well. The fabrication process is composed by adapting the CMOS 0.18 µm back end of line (BEOL) process on 200 mm wafers. The MEMS process in the CMOS process enables the realization of passive devices integrated with active devices, which is effective for size and cost reduction. Two metal interconnection layers in the BEOL process are used for the MEMS process. Interconnection aluminum and inter-layer dielectric tetraethoxysilane (TEOS) are used as MEMS structural material and sacrificial material, respectively. The chemical mechanical polishing (CMP) process is implemented to planarize the sacrificial material surface. The structures were fabricated using a simple low-cost two-mask process. The characteristics of switching capacitors, C-V, RF performance, switching speed and continuous drive cycles are measured on the fabricated devices. The capacitance ratio for the down-state/up-state is Cdown/Cup = 5.4. The characteristics of switching speed response/actuation voltage in the down-state and up-state are 4.5 µs/5 V and 8.0 µs/5 V, respectively. The switching speed is stable up to 107 cycles in spite of the fact that the unipolar voltage speed is stable up to 107 cycles.
Journal of the Acoustical Society of America | 2010
Kunihiko Nakamura; Hideki Kawakatsu
Archive | 2003
Yoshito Nakanishi; Kunihiko Nakamura
Journal of the Acoustical Society of America | 2006
Kunihiko Nakamura; Yoshito Nakanishi
Archive | 2003
Norisato Shimizu; Yoshito Nakanishi; Kunihiko Nakamura; Yasuyuki Naito
Journal of the Acoustical Society of America | 2011
Kunihiko Nakamura; Hideki Kawakatsu
Archive | 2013
Kunihiko Nakamura
Archive | 2011
Tomohiro Iwasaki; Keiji Onishi; Kunihiko Nakamura
Archive | 2010
Kunihiko Nakamura