Kyu-Hyun Choi

New metal structure by sidewall encapsulation method

The microvoids or etch defects are occurred at the sidewall of metal line where is one of the weak points against stress induced migration (SM) and electromigration (EM). These defects result in metal line failure so that degrade reliability of metal line. Until now, sidewall hillock or sidewall defect has been reported, but the suppression method is not suggested. In this report, newly developed metal line structure by sidewall-encapsulation technique is proposed, which is to make an Al/sub 3/Ti and/or Al/sub 12/W intermetallic compound at the sidewall of metal line by deposition of Ti, TiN, or TiW on the patterned metal line. Therefore, this technique provides some advantages such as an application of Al-reflow process, the improvement of SM resistance and EM lifetime, and sidewall hillock suppression. Additionally, using AES depth profiles and SEM, the obtained results are analyzed to prove the mechanism of reliability improvement.

A global optimization of bipolar model parameters using simulated diffusion

In this paper, a novel parameter extraction algorithm based on modified simulated diffusion (SD) is presented. The utility of this program is demonstrated by applying it to the parameter extraction of a 40 V bipolar transistor and a 2 /spl mu/m polysilicon emitter bipolar transistor. It is the first time that DC and AC bipolar model parameters have been extracted simultaneously via the global optimization methodology using SD. Indeed this tool, supported by an excellent agreement between the measured and simulated data, is a powerful means for the modeling of any devices.<<ETX>>

The Formation Mechanism and Removal Methods of Metal Pillar by Plasma Etch

During the plasma etching of Al-Si-Cu alloy used as a metal interconnection, it is generally reported that the metal pillar (or conical residue) affecting the degradation of device yield is formed by the micromasking effect of copper compound. However, it is stilldisputed with the formation mechanism and composition of the micromasking material. Moreover, the elimination method of the metal pillar is not well known. According to previous reports, it is argued that the micromasking material consists of Cu agglomerates, A1 2 Cu, or CuC1, and the formation mechanism of the micromasking is due to byproduct during plasma etching or reaction product during metal depositionor etching. However, using scanning electron microscopy (SEM), energy dispersive of x-ray (EDX), and high resolution Auger spectroscopy (HRAES), it is newly found that the micromasking consists of three layered structure, that is copper aluminum oxide, A1 2 Cu, and Cu agglomerates. These results are quite different from previous reports. In addition, the removal methods of the metal pillar are suggested, which are high power dry etch process and multilayered metal deposition.

Device Design Issues for Electro-static Discharge Suppression Based on the Monitoring of the Lattice Temperature

In this paper, we demonstrate that it is possible to develop an optimum ESD protection device by comparing the relative ESD immunity of each combination of various smctures and layouts, based on the monitoring of silicon lattice temperature. The methodology, supported by measurements, could give an extra degree of freedom to the IC designer confronted with the troublesome ESD phenomenon.