Kyu Seok Han

Highly ordered and vertically oriented TiO2/Al2O3 nanotube electrodes for application in dye-sensitized solar cells

The surface of long TiO2 nanotube (NT) electrodes in dye-sensitized solar cells (DSSCs) was modified without post-annealing by using atomic layer deposition (ALD) for the enhancement of photovoltage. Vertically oriented TiO2 NT electrodes with highly ordered and crack-free surface structures over large areas were prepared by a two-step anodization method. The prepared TiO2 NTs had a pore size of 80 nm, and a length of 23 μm. Onto these TiO2 NTs, an Al2O3 shell of a precisely controlled thickness was deposited by ALD. The conformally coated shell layer was confirmed by high-resolution transmission electron microscopy, energy-dispersive x-ray spectroscopy, and x-ray photoelectron spectroscopy. The open-circuit voltage (V(oc)) of the DSSCs was gradually enhanced as the thickness of the Al2O3 shell of the TiO2/Al2O3 NT electrodes was increased, which resulted from the enhanced electron lifetime. The enhanced electron lifetime caused by the energy barrier effect of the shell layer was measured quantitatively by the open-circuit voltage decay technique. As a result, 1- and 2-cycle-coated samples showed enhanced conversion efficiencies compared to the bare sample.

Cross-Stacked Single-Crystal Organic Nanowire p−n Nanojunction Arrays by Nanotransfer Printing

We fabricated cross-stacked organic p-n nanojunction arrays made of single-crystal 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-PEN) and fullerene (C60) nanowires as p-type and n-type semiconductors, respectively, by using a nanotransfer printing technique. Single-crystal C60 nanowires were synthesized inside nanoscale channels of a mold and directly transferred onto a desired position of a flexible substrate by a lubricant liquid layer. In the consecutive printing process, single-crystal TIPS-PEN nanowires were grown in the same way and then perpendicularly aligned and placed onto the C60 nanowire arrays, resulting in a cross-stacked single-crystal organic p-n nanojunction array. The cross-stacked single-crystal TIPS-PEN/C60 nanowire p-n nanojunction devices show rectifying behavior with on/off ratio of ∼ 13 as well as photodiode characteristic with photogain of ∼ 2 under a light intensity of 12.2 mW/cm(2). Our study provides a facile, solution-processed approach to fabricate a large-area array of organic crystal nanojunction devices in a desired arrangement for future nanoscale electronics.

Extremely High Barrier Performance of Organic–Inorganic Nanolaminated Thin Films for Organic Light-Emitting Diodes

This work presents a novel barrier thin film based on an organic-inorganic nanolaminate, which consists of alternating nanolayers of self-assembled organic layers (SAOLs) and Al2O3. The SAOLs-Al2O3 nanolaminated films were deposited using a combination of molecular layer deposition and atomic layer deposition techniques at 80 °C. Modulation of the relative thickness ratio of the SAOLs and Al2O3 enabled control over the elastic modulus and stress in the films. Furthermore, the SAOLs-Al2O3 thin film achieved a high degree of mechanical flexibility, excellent transmittance (>95%), and an ultralow water-vapor transmission rate (2.99 × 10-7 g m-2 day-1), which represents one of the lowest permeability levels ever achieved by thin film encapsulation. On the basis of its outstanding barrier properties with high flexibility and transparency, the nanolaminated film was applied to a commercial OLEDs panel as a gas-diffusion barrier film. The results showed defect propagation could be significantly inhibited by incorporating the SAOLs layers, which enhanced the durability of the panel.

Organic–inorganic nanohybrid nonvolatile memory transistors for flexible electronics

We report on a low-temperature fabrication of organic–inorganic nanohybrid nonvolatile memory transistors using molecular layer deposition combined with atomic layer deposition. A 3 nm ZnO:Cu charge trap layer is sandwiched between 6 nm tunneling and 20 nm blocking self-assembled organic layers. First, we identify a large memory window of 14.1 V operated at ±15 V using metal–oxide–semiconductor capacitors. Second, we apply the capacitor structure to the nonvolatile memory transistors which operate in the low voltage range of −1 to 3 V. The writing/erasing (+8 V/−12 V) current ratio of ∼103 of the memory transistors is maintained during the static and dynamic retention measurements. The reported organic–inorganic devices offer new opportunities to develop low-voltage-driven flexible memory electronics fabricated at low temperatures.