L.D. Nguyen

Ultra-high speed modulation-doped field-effect transistors: a tutorial review

A tutorial review on the modulation-doped field-effect transistor (MODFET) and its application to ultra-low-noise, medium-power, and ultra-wide-band traveling-wave amplifiers as well as ultra-high-speed digital logic circuits is presented. It is believed that with further advances in material growth and device scaling significant improvements in cutoff frequencies, switching speed, noise, and power will be achieved in the near future. >

650-AA self-aligned-gate pseudomorphic Al/sub 0.48/In/sub 0.52/As/Ga/sub 0.2/In/sub 0.8/As high electron mobility transistors

The authors report on the design and fabrication of a 650-AA self-aligned-gate pseudomorphic Al/sub 0.48/In/sub 0.52/As/Ga/sub 0.2/In/sub 0.8/As high electron mobility transistor (HEMT) with a state-of-the-art current gain cutoff frequency of over 300 GHz. This work clearly demonstrates the potential of sub-0.1- mu m gate-length HEMTs for near-future microwave and millimeter-wave applications.<<ETX>>

Novel high performance self-aligned 0.15 micron long T-gate AlInAs-GaInAs HEMTs

A novel self-aligned technique for 0.15- mu m-gate-length HEMTs (high electron mobility transistors) has been demonstrated. This technology uses a 0.15- mu m-long T-gate structure defined by e-beam lithography with a SiO/sub 2/ sidewall to implement the self-aligned scheme. The resultant device has low source and drain resistances, low gate resistance (200 Omega /mm), and a passivating layer over the active channel. Devices with an oxide sidewall yielded an f/sub T/ of 177 GHz, whereas devices with no sidewall exhibited an f/sub T/ greater than 250 GHz. The difference has been related to process damage during plasma deposition of SiO/sub 2/.<<ETX>>

High-power V-band AlInAs/GaInAs on InP HEMTs

The DC and RF performance of delta -doped channel AlInAs/GaInAs on InP power high-electron-mobility transistors (HEMTs) are reported. A 450- mu m-wide device with a gate-length of 0.22 mu m has achieved an output power of 150 mW (at the 1-dB gain compression point) with power-added efficiency of 20% at 57 GHz. The device has a saturated output power of 200 mW with power-added efficiency of 17%. This is the highest output power measured from a single InP-based HEMT at this frequency, and demonstrates the feasibility of these HEMTs for high-power applications in addition to low-noise applications at V-band.<<ETX>>

Very low noise and low power operation of cryogenic AlInAs/GaInAs/InP HFET's

The cryogenic performance of 0.15 /spl mu/m gate length AlInAs/GaInAs/InP devices is reported. A noise temperature of less than 10 K (less than five times over quantum limit hf/k) is demonstrated at 40 GHz with a power consumption of less than 0.6 mW under optimal noise bias condition. With about 5 K penalty in noise performance at 40 GHz, the devices could be operated with as little as 60 /spl mu/W total power consumption. An interpretation of the measured noise performance with the help of a noise model, room temperature S-parameters and DC characteristics (measured at room and cryogenic temperatures) is offered.<<ETX>>

High power and high efficiency AlInAs/GaInAs on InP HEMTs

The authors report on the development of AlInAs/GaInAs-on-InP power HEMTs (high electron mobility transistors). Output power densities of more than 730 mW/mm and 960 mW/mm with power-added efficiencies (PAE) of 50% and 40% respectively, were achieved at 12 GHz. When biased for maximum efficiency, a PAE of 59% and an output power of 470 mW/mm with 11.3 dB gain were obtained. These results demonstrate the viability of these HEMTs for power amplification. Considering that these HEMTs have an f/sub max/ of over 200 GHz, they should also have good power performance at millimeter-wave frequencies.<<ETX>>

High performance, high yield millimeter-wave MMIC LNAs using InP HEMTs

A millimeter-wave MMIC low noise amplifier chip set has been developed. Based on the InP HEMT technology, these LNAs provide state-of-the-art performance as well as excellent yield and repeatability. With greater than 50% chip yield, a three-stage Q-band LNA design achieved 26 to 31 dB of gain from 42 to 50 GHz and 1.8 dB average noise figure from 43.3 to 45.7 GHz. In addition, there are six other LNA designs including a four-stage V-band LNA with 28 dB of gain and 2.3 dB noise figure and a two-stage balanced Q-band LNA that provided 17 dB of gain and has greater than 61% yield.

Fabrication of a 80 nm self-aligned T-gate AlInAs/GaInAs HEMT

The authors report on the fabrication and characterization of a high-performance 80-nm self-aligned T-gate AlInAs/GaInAs high electron mobility transistor (SAGHEMT). The 80 nm*50 mu m devices reported exhibit good pinchoff characteristics, high transconductance (g/sub m/=1150 mS/mm), low output conductance (g/sub ds/=120 mS/mm at RF), and state-of-the-art current gain cutoff frequency (f/sub T/=250 GHz). Modeling and analysis indicate that it is possible to significantly improve the performance of AlInAs/GaInAs SAGHEMTs by further reducing the gate length and/or optimizing the device structure.<<ETX>>

Effect of Si movement on the electrical properties of inverted AlInAs–GaInAs modulation doped structures

Inverted modulation doped structures typically exhibit degraded electrical characteristics. For the AlInAs‐GaInAs heterojunction system, the reduction in electron mobility for two‐dimensional electron gases formed at inverted interfaces can be greater than 50% at 300 K as compared to those formed at normal interfaces. Our data show that the reduction in mobility is due to the movement of Si into the GaInAs channel. The Si movement is found to be dramatically reduced by growing the AlInAs spacer at the inverted interface at a substrate temperature of 300–350 °C. Device structures have been grown using this technique which exhibit the highest conductivity obtained for any 2DEG system.

Vertical scaling of ultra-high-speed AlInAs-GaInAs HEMTs

The scaling of the vertical dimensions of 0.15- mu m-gate-length Al/sub 0.48/In/sub 0.52/As-Ga/sub 0.47/In/sub 0.53/As high-electron-mobility transistors (HEMTs) to reduce their well-known excessive gate leakage current, premature breakdown voltage, and poor output conductance is discussed. It is found that, with a proper choice of doping densities and layer thicknesses, it is possible to realize very-high-performance AlInAs-GaInAs HEMTs (f/sub T/=160 GHz, f/sub max/=300 GHz for 0.15- mu m*50- mu m devices) with low gate leakage current, high breakdown voltage (7.0 V), and very low DC output conductance (45-mS/mm). The DC output conductance exhibits a very strong dependence on the AlInAs doping-thickness product and appears to be a limiting factor in the device power gain. By reducing the doping-thickness product, it was possible to reduce the output conductance by a factor of 3 and thus increase the power gain cutoff frequency by a factor of 1.7.<<ETX>>