Laegu Kang

Thermal stability and electrical characteristics of ultrathin hafnium oxide gate dielectric reoxidized with rapid thermal annealing

Dielectric properties of ultrathin hafnium oxide reoxidized with rapid thermal annealing (RTA) have been investigated. Capacitance equivalent oxide thickness (CET) of 45 A hafnium oxide was scaled down to ∼10 A with a leakage current less than 3×10−2 A/cm2 at −1.5 V (i.e., ∼2 V below VFB). Leakage current increase due to crystallization was not observed even after 900 °C rapid thermal annealing (RTA), but CET did increase after high temperature RTA due to the interfacial layer growth and possible silicate formation in the HfO2 film.

Electrical characteristics of highly reliable ultrathin hafnium oxide gate dielectric

Electrical and reliability properties of ultrathin HfO/sub 2/ have been investigated. Pt electroded MOS capacitors with HfO/sub 2/ gate dielectric (physical thickness /spl sim/45-135 /spl Aring/ and equivalent oxide thickness /spl sim/13.5-25 /spl Aring/) were fabricated. HfO/sub 2/ was deposited using reactive sputtering of a Hf target with O/sub 2/ modulation technique. The leakage current of the 45 /spl Aring/ HfO/sub 2/ sample was about 1/spl times/10/sup -4/ A/cm/sup 2/ at +1.0 V with a breakdown field /spl sim/8.5 MV/cm. Hysteresis was <100 mV after 500/spl deg/C annealing in N/sub 2/ ambient and there was no significant frequency dispersion of capacitance (<1%/dec.). It was also found that HfO/sub 2/ exhibits negligible charge trapping and excellent TDDB characteristics with more than ten years lifetime even at V/sub DD/=2.0 V.

Ultrathin hafnium oxide with low leakage and excellent reliability for alternative gate dielectric application

Physical, electrical and reliability characteristics of ultra thin HfO/sub 2/ as an alternative gate dielectric were studied for the first time. Crucial process parameters of oxygen modulated dc magnetron sputtering were optimized to achieve an equivalent oxide thickness (EOT) of 11.5 /spl Aring/ without deducting the quantum mechanical effect. Leakage current was 3/spl times/10/sup -2/ A/cm/sup 2/ at +1 V. Excellent dielectric properties such as high dielectric constant, low leakage current, good thermal stability, negligible dispersion and good reliability were demonstrated.

Electrical and reliability characteristics of ZrO2 deposited directly on Si for gate dielectric application

ZrO2 thin film has been studied as an alternative gate dielectric. It was deposited directly on a Si substrate by reactive sputtering. An equivalent oxide thickness of less than 11 A with a leakage current of 1.9×10−3 A/cm2 at −1.5 V relative to the flat band voltage has been obtained. Well-behaved capacitance–voltage characteristics with an interface state density of less than 1011 cm−2 eV−1 and no significant frequency dispersion have been achieved. Excellent reliability properties (e.g., low charge trapping rate, good time-dependent dielectric breakdown, low stress-induced leakage current, and high dielectric breakdown) have also been obtained.

MOSCAP and MOSFET characteristics using ZrO/sub 2/ gate dielectric deposited directly on Si

MOSCAP and MOSFET characteristics using ZrO/sub 2/ gate dielectric deposited directly on Si have been investigated. Thin equivalent oxide thickness (EOT), low leakage, negligible frequency dispersion, interface density less than 10/sup 11/ cm/sup -2/ eV/sup -1/, small hysteresis, excellent reliability characteristics have been demonstrated. The ZrO/sub 2/ film has been shown to be amorphous. A thin interfacial Zr-silicate layer (k>8) exists and is beneficial in maintaining good interfacial quality. This Zr-silicate layer grows after annealing and can be minimized through process optimization. Well-behaved p-channel MOS transistor characteristics with a subthreshold swing of 80 mV/decade have also been achieved.

Ultrathin zirconium silicate film with good thermal stability for alternative gate dielectric application

Zirconium silicate (ZrSixOy) films have been sputtered by comagnetron-reactive sputtering. The composition of ZrSixOy has been controlled by adjusting the sputtering powers of Si and Zr targets to achieve various effective dielectric constants. The sputtered silicate layers showed low equivalent oxide thickness of 14.5 A with a low leakage of 3.3×10−3 A/cm2 at −1.5 V relative to flat band voltage. The silicate films also exhibited good high-temperature stability and smooth interfacial properties on silicon substrate.

MOSFET devices with polysilicon on single-layer HfO/sub 2/ high-K dielectrics

MOSFETs and MOSCAPs of a single-layer thin HfO/sub 2/ gate dielectric with dual polysilicon gate were fabricated with self-aligned process and characterized. Polysilicon and dopant activation processes were optimized such that leakage current and equivalent oxide thickness (EOT) of HfO/sub 2/ remain low (EOT of 12.0 /spl Aring/. HfO/sub 2/ with 1/spl times/10/sup -3/ A/cm/sup 2/ at Vg=1.0 V). Reasonable N- and P-MOSFET characteristics such as subthreshold swing of 74 mV/decade and output currents were also demonstrated.

Performance of MOSFETs with ultra thin ZrO/sub 2/ and Zr silicate gate dielectrics

In this paper, we report the transistor performance of both PMOS and NMOS fabricated with ZrO/sub 2/ and Zr-silicate gate dielectrics. These high-k films exhibit low leakage, low subthreshold swing (S), and good on-off characteristics. Good effective electron and hole mobilities were obtained. It was found that for Zr-silicate, a mobility closer to thermal SiO/sub 2/ was demonstrated due to the better interface with Si substrate.

Characteristics of TaN gate MOSFET with ultrathin hafnium oxide (8 /spl Aring/-12 /spl Aring/)

MOSFETs with equivalent oxide thickness of 8-12 /spl Aring/ have been demonstrated by using high-K gate dielectric thin films (HfO/sub 2/) and TaN gate electrode. Both self-aligned (higher thermal budget process) and non-self-aligned process (low thermal budget as in the replacement gate process) were used and compared. Excellent electrical characteristics (e.g. S/spl sim/68 mV/dec) and reliability characteristics (e.g. high E/sub BD/, low charge trapping and SILC) were also obtained.

Single-layer thin HfO/sub 2/ gate dielectric with n+-polysilicon gate

MOSCAPs and MOSFETs of a single-layer thin HfO/sub 2/ gate dielectric with n+ polysilicon gate were fabricated and characterized. Polysilicon process was optimized such that leakage current and equivalent oxide thickness of HfO/sub 2/ remained low. Excellent C-V properties (e.g. low Dit and frequency dispersion) and reliability characteristics were obtained. Reasonable MOSFET quality was also demonstrated.