Lawrence Jacobowitz

An all digital frequency-locked loop immune to hysteresis effects for power management of multicore processors

Low power design has always been critical to high performance. With the latest technologies, being able to significantly reduce any portion of the overall system power becomes an absolute requirement for extending the lifetime of the system. Clock generation and clock tree distribution are always identified as a significant portion of the power dissipated in a chip. We describe here a servocontrol circuit method that will provide both a lower power clock generation scheme as well as automated power management using the clock elements. The self correcting nature of the circuits proposed also offer good immunity against hysteresis effects.

Wavelength-Locked Loops for Optical Communication

Although there has been a decrease in telecom research since 2000, significant optical engineering advances continue to provide important contributions to wide-bandwidth communications.

Wavelength locked loops for optical communication networks

Optical communication systems based on dense wavelength division multiplexing (DWDM) would benefit from the ability to adjust the operating wavelength of a laser transmitter. Previous attempts, including thermal adjustment, etalon based wavelength locking, and various types of optical frequency and phase locked loops such as the Pound-Drever-Hall technique suffer from weaknesses including sensitivity to noise at their zero crossings and non-signed error signals which require calibrated differential receivers. In this paper, we describe a new servocontrol circuit technique for wavelength locked feedback loops which overcome many of these concerns. Experimental results are presented illustrating this technique, in which a Fabry-Perot laser is locked to a commercially available DWDM filter within an accuracy of about 3 nm without the need fort thermoelectric cooling.