Lisa Anneberg
Lawrence Technological University
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Publication
Featured researches published by Lisa Anneberg.
Microelectronics Reliability | 1996
Harpreet Singh; S. Vaithilingam; R.K. Anne; Lisa Anneberg
Terminal reliability has been a topic of research for the last three decades. Several techniques for determining terminal reliability are available in literature. Binary decision diagrams have attracted the attention of several digital logic research workers. The objective of this paper is to illustrate how binary decision diagrams can be exploited for determining terminal reliability of networks.
Microelectronics Reliability | 1996
Harpreet Singh; H. Singh Bawa; Lisa Anneberg
A great deal of interest has emerged recently in the field of Boolean neural networks. Boolean neural networks require far less training than the conventional neural networks and have a variety of applications. They are also strong candidates for VLSI design. In this paper, a technique for learning representation of an adder-subtractor cell has been proposed. The technique can be exploited for the VLSI design of an arithmetic unit for a pipelined digital computer.
International Journal of Modelling and Simulation | 2000
Ece Yaprak; Y. Xiao; Anthony T. Chronopoulos; E. Chow; Lisa Anneberg
Abstract Computer networking communications are now in the era of dedicated, high-speed switched networks. Asynchronous Transfer Mode (ATM) networks are increasing in importance because ATM technology has the ability to deliver a high quality of service, while simultaneously supporting multiple classes of traffic on the same transmission pathway. Traffic management is increasingly becoming an important focus of study in ATM networks. In this context, congestion control through adequate buffering is becoming particularly significant to minimize the probability of cell loss and cell delay when multiple large traffic bursts are received concurrently at a switch [1,2]. This paper presents a simulation of a new dynamic buffer allocation management scheme in ATM networks. To achieve this objective, an algorithm that detects congestion and updates the dynamic buffer allocation scheme was developed for the OPNET simulation package via the creation of a new ATM module. This dynamic buffer allocation scheme utilizes four identified attributes: in-use bandwidth, in-use bandwidth of distinct Quality of Service (QoS) of an incoming traffic, available number of buffers on the corresponding logical queue, and the latest short-term cell arrival rate destined to the corresponding output port. The behavior of the network under bursty traffic conditions was examined.
Microelectronics Reliability | 1994
Rabindra Nath Chakraborty; Ece Yaprak; Lisa Anneberg
Abstract The inherent functional property of the unidirectional token movement in a token ring network, is modified in this paper and an algorithm is presented that enables the continuity of operation, in case of a single link component failure, thereby improving the system reliability of a basic conventional token ring network. This phase contributes to the continuity in operation until the maintenance restores the normal ring configuration.
IEEE Transactions on Education | 1999
Lisa Anneberg; Ece Yaprak
1999 Annual Conference | 1999
Roger C. Ferguson; Lisa Anneberg
frontiers in education conference | 2007
Janice K. Means; Lisa Anneberg; Christina Snyder; Jin Feng
2005 ASEE Annual Conference and Exposition: The Changing Landscape of Engineering and Technology Education in a Global World | 2005
Ece Yaprak; Lisa Anneberg
2003 ASEE Annual Conference and Exposition: Staying in Tune with Engineering Education | 2003
Ece Yaprak; Lisa Anneberg
2003 ASEE Annual Conference and Exposition: Staying in Tune with Engineering Education | 2003
Lisa Anneberg; Roger C. Ferguson; Ece Yaprak