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Dive into the research topics where Lisane B. de Brisolara is active.

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Featured researches published by Lisane B. de Brisolara.


design automation conference | 2007

Simulink-based MPSoC design flow: case study of Motion-JPEG and H.264

Kai Huang; Sang-Il Han; Katalin Popovici; Lisane B. de Brisolara; Xavier Guerin; Lei Li; Xiaolang Yan; Soo-Ik Chae; Luigi Carro; Ahmed Amine Jerraya

System-level design methodologies have been introduced as a solution to handle the design complexity of embedded multiprocessor SoC (MPSoC) systems. In this paper we describe a system-level design flow starting from Simulink specification, focusing on concurrent hardware and software design and verification at four different abstraction levels: Simulink Combined Algorithm and Architecture Model (CAAM), Virtual Architecture, Transaction-accurate Model and Virtual Prototype. We used two multimedia applications, Motion-JPEG and H.264, to evaluate this design flow. Experimental results show that our design flow can generate various MPSoC architectures from Simulink CAAM correctly and efficiently, allowing processor and task design space exploration at different abstraction levels.


2012 Brazilian Symposium on Computing System Engineering | 2012

A Model Driven Approach for Android Applications Development

Abilio G. Parada; Lisane B. de Brisolara

The mobile application development industry is increasingly growing up due to the intensive use of applications in mobile devices, most of them running Android Operating System. However, developing applications for mobile platforms demands additional worries such as code efficiency, interaction with device resources, as well as short time-to-market. Model-driven Engineering (MDE) combined with UML, as already used in software engineering, could provide abstraction and automation for mobile software developers. To support that, adequate tools and approaches are required. This paper presents a MDE approach for Android applications development, which includes UML-based modeling and code generation in order to facilitate and accelerate the development of mobile applications.


design, automation, and test in europe | 2008

Using UML as front-end for heterogeneous software code generation strategies

Lisane B. de Brisolara; Marcio F. da S. Oliveira; Ricardo Miotto Redin; Luís C. Lamb; Luigi Carro; Flávio Rech Wagner

In this paper we propose an embedded software design flow, which starts from an UML model and provides automatic mapping to other models like Simulink or finite-state machines (FSM). An automatic synthesis of an executable and synthesizable Simulink model is also proposed, enabling the use of UML as front-end for a multi-model design strategy that includes a Simulink-based MPSoC target design flow. In addition, the proposed synthesis tool automatically handles processor allocation, mapping of threads to processors, and insertion of required Simulink temporal barriers, ports, and dataflow connections. Following this approach, the UML model is mapped to the more appropriated model and specialized code generators are used. Therefore, this approach allows designers to employ UML to model the whole system and reuse this model to generate code using different strategies and targeting different platforms.


Integration | 2009

Simulink ® -based heterogeneous multiprocessor SoC design flow for mixed hardware/software refinement and simulation

Sang-Il Han; Soo-Ik Chae; Lisane B. de Brisolara; Luigi Carro; Katalin Popovici; Xavier Guerin; Ahmed Amine Jerraya; Kai Huang; Lei Li; Xiaolang Yan

As a solution for dealing with the design complexity of multiprocessor SoC architectures, we present a joint Simulink-SystemC design flow that enables mixed hardware/software refinement and simulation in the early design process. First, we introduce the Simulink combined algorithm/architecture model (CAAM) unifying the algorithm and the abstract target architecture. From the Simulink CAAM, a hardware architecture generator produces architecture models at three different abstract levels, enabling a trade-off between simulation time and accuracy. A multithread code generator produces memory-efficient multithreaded programs to be executed on the architecture models. To show the applicability of the proposed design flow, we present experimental results on two real video applications.


2011 Brazilian Symposium on Computing System Engineering | 2011

Generating Java Code from UML Class and Sequence Diagrams

Abilio G. Parada; Eliane Siegert; Lisane B. de Brisolara

UML-based approaches provide abstraction todeal with the high complexity of embedded applications andwhen combined with Model-driven Engineering can also pro-vide automation trough automatic code generation. This paperpresents an approach to automatically generate structuraland behavioral code from UML class and sequence diagrams.This approach is demonstrated through a case study and wasvalidated by the implementation of a code generator.


software and compilers for embedded systems | 2007

Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC

Lisane B. de Brisolara; Sang-Il Han; Xavier Guerin; Luigi Carro; Ricardo Reis; Soo-Ik Chae; Ahmed Amine Jerraya

Heterogeneous MPSoCs present unique opportunities for emerging embedded applications, which require both high-performance and programmability. Although, software programming for these MPSoC architectures requires tedious and error-prone tasks, thereby automatic code generation tools are required. A code generation method based on fine-grain specification can provide more design space and optimization opportunities, such as exploiting fine-level parallelism and more efficient partitions. However, when partitioned, fine-grain models may require a large number of inter-processor communications, decreasing the overall system performance. This paper presents a Simulink-based multithread code generation method, which applies Message Aggregation optimization technique to reduce the number of inter-processor communications. This technique reduces the communication overheads in terms of execution time by reduction on the number of messages exchanged and in terms of memory size by the reduction on the number of channels. The paper also presents experiment results for one multimedia application, showing performance improvements and memory reduction obtained with Message Aggregation technique.


IFIP Working Conference on Distributed and Parallel Embedded Systems | 2004

Design Space Exploration with Automatic Generation of IP-Based Embedded Software

Júlio C. B. de Mattos; Lisane B. de Brisolara; Renato Fernandes Hentschke; Luigi Carro; Flávio Rech Wagner

Automatic embedded software generation and IP-based design are good approaches to achieve a short design cycle due to stringent time-to-market requirements. But design automation must also consider application-specific requirements. This paper presents a mechanism for the automatic selection of software IP components for embedded applications, which is based on a software IP library and a design space exploration tool. The software IP library has different algorithmic implementations of several routines commonly found in different application domains. These routines have been characterized in terms of power, performance, and area, for a given architectural platform. The design exploration tool allows the automatic configuration of an optimized solution for a specific application, by selecting routines whose combination best match system requirements. Experimental results are presented and demonstrate that a very expressive design space can be explored with this approach.


international conference on industrial informatics | 2014

Integrating UML, MARTE and sysml to improve requirements specification and traceability in the embedded domain

Milena Rota Sena Marques; Eliane Siegert; Lisane B. de Brisolara

This work presents a model-driven requirement engineering approach for the embedded software domain. This approach is based on UML, MARTE and SysML standard notations, which are integrated in order to improve requirements specification and traceability. MARTE stereotypes are mainly used to specify non-functional requirements, exceptionally imperative in this domain, while SysML notations integrated to UML models support requirements management. The management is based on traceability matrixes, which are automatically generated from SysML requirements diagrams. Furthermore, we illustrate the effectiveness of our approach by means of a case study.


IFIP Working Conference on Distributed and Parallel Embedded Systems | 2008

On the Use of Software Quality Metrics to Improve Physical Properties of Embedded Systems

Ricardo Miotto Redin; Marcio F. da S. Oliveira; Lisane B. de Brisolara; Júlio C. B. de Mattos; Luís C. Lamb; Flávio Rech Wagner; Luigi Carro

As software production achieves a growing importance in the embedded systems world, quality evaluation of embedded software and its impact on physical properties of embedded systems becomes increasingly relevant. Although there are tools for embedded software design that improve software specification and verification, we are still short of a tool that supports the designers decisions on the best design strategy regarding low level, physical characteristics like performance, energy, and memory footprint, which are critical in the embedded domain. In this paper, we provide an analysis of the correlation between software quality metrics and physical metrics for embedded software. By means of experiments, we investigate the impact of software engineering best practices on embedded software and show that software quality metrics can be used to guide design decisions toward improving physical properties of embedded systems.


asia and south pacific design automation conference | 2005

Comparing high-level modeling approaches for embedded system design

Lisane B. de Brisolara; Leandro Buss Becker; Luigi Carro; Flávio Rech Wagner; Carlos Eduardo Pereira; Ricardo Reis

This paper presents a comparison between three different high-level modeling approaches for embedded systems design, focusing on systems that require dataflow models. The proposed evaluation investigates the facilities provided by these approaches for expressing system requirements, functional specification, and timing constraints. Properties like model readability, testability, and implementability are also considered. Moreover, the support to different Models of Computation is also evaluated. A Crane Control System is used as case study to apply the proposed comparison criteria.

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Dive into the Lisane B. de Brisolara's collaboration.

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Luigi Carro

Universidade Federal de Santa Catarina

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Flávio Rech Wagner

Universidade Federal do Rio Grande do Sul

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Ahmed Amine Jerraya

Centre national de la recherche scientifique

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Paulo Roberto Ferreira

Universidade Federal de Pelotas

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Sang-Il Han

Seoul National University

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Soo-Ik Chae

Seoul National University

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Júlio C. B. de Mattos

Universidade Federal do Rio Grande do Sul

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