Lothar Schleicher

Photo-stimulated CVD of SiNx for GaAs IC applications

The characteristics of silicon nitride deposited by a photo-enhanced CVD process have been investigated. The nitride films are used as inter metal insulator in GaAs ICs. For this application the step coverage is the most crucial aspect. The photo-CVD of SiNx proves to be a surface determined deposition process, even in the case of undercutted structures. The insulation between first and second metallization was measured on a contact test structure with 1800 cross-overs. The insulating resistance in this structure is in the GΩ range even if the nitride is only 300 nm thick. A thickness uniformity of 4% for a batch of six 3 inch wafers and a reproducibility of 5% were obtained for 300 nm thick films, the intrinsic tensile stress being as small as 107 to 108 dyn/cm2. The threshold voltage shift due to deposition was only -25 mV for MESFETs in GaAs ICs.

A self-aligned GaAs MESFET process with WSi gates for analog and digital applications

Abstract A GaAs MESFET fabrication process based on self-aligned WSi gates with gatelengths down to 0.5 μm is described. A buried p-layer is employed to suppress short-channel effects. The shallow FET channels are connected to the deeper implants of the ohmic source and drain contacts by means of an intermediate-dose “lightly-doped drain” (LDD) implant. Owing to a planarization concept which allows the use of a low-resistance Au overlayer on top of the high resistivity WSi gates, the process yields FETs with excellent high-frequency performance. This is proved by transit frequencies ƒ t exceeding 30 GHz, maximum frequencies of oscillation ƒ max of typically 100 GHz, and a noise figure NFmin of 1.0 dB at 12 GHz (nominal gatelength 0.5 μm). FETs with three different threshold voltages are fabricated. All three types of transistors have transconductances of 300 mS/mm or above. This combination of properties makes the technology suitable for the realization of digital as well as microwave circuits.

Characterization of WSix gate metal process for GaAs MESFET's

Abstract A WSi0.4 cosputtering process has been developed to provide a gate metallization for GaAs self-aligned MESFET devices. The deposition parameters were optimized to produce films with good interface stability during 800°C n+ implant activation anneal. The importance of the amorphous structure to serve as a good diffusion barrier is emphasized. Various analytical methods are employed to characterize the gate metal/GaAs interface. I–V diode measurements were used to characterize contact electrical properties such as barrier height and ideality factor. MESFETs with a very shallow channel implant (10 keV) were fabricated with a K-value of 510 mS/V·mm, thus the good stability of the Schottky contact to GaAs was confirmed.