Dietrich Ristow

WSix refractory gate metal process for GaAs MESFETs

Abstract A co-sputtering process is characterized which allows the deposition of WSi 0.4 layers for Schottky gates of GaAs self-aligned MESFETs. The process parameters were optimized to yield films with low stress, good adhesion and a high interface stability during 800°C n + implant activation anneal. The good diffusion barrier properties of the Schottky metal can be attributed to the amorphous nature of the film. This implies a natural explanation of the optimum film composition. Employing various analytical methods the gate metal/GaAs interface was characterized after 800°C anneal. I − V diode measurements were performed to obtain contact electrical properties such as barrier height and ideality factor. MESFETs with different channel implants down to 10 keV were fabricated to confirm the good stability of the Schottky contact.

A self-aligned GaAs MESFET process with WSi gates for analog and digital applications

Abstract A GaAs MESFET fabrication process based on self-aligned WSi gates with gatelengths down to 0.5 μm is described. A buried p-layer is employed to suppress short-channel effects. The shallow FET channels are connected to the deeper implants of the ohmic source and drain contacts by means of an intermediate-dose “lightly-doped drain” (LDD) implant. Owing to a planarization concept which allows the use of a low-resistance Au overlayer on top of the high resistivity WSi gates, the process yields FETs with excellent high-frequency performance. This is proved by transit frequencies ƒ t exceeding 30 GHz, maximum frequencies of oscillation ƒ max of typically 100 GHz, and a noise figure NFmin of 1.0 dB at 12 GHz (nominal gatelength 0.5 μm). FETs with three different threshold voltages are fabricated. All three types of transistors have transconductances of 300 mS/mm or above. This combination of properties makes the technology suitable for the realization of digital as well as microwave circuits.

Microwave field-effect transistors from sulphur-implanted GaAs

Sulphur implantation into semi-insulating GaAs has been used to fabricate 1,5µ-gate-MESFETs showing microwave gain equivalent to epitaxial FETs (MAG = 10 dB at 10 GHz) but higher noise. Room temperature implantation of S at an energy of 30 keV and a dose of 5.10¹²cm^-2sputtered SiO<inf>2</inf>and Si<inf>3</inf>N<inf>4</inf>as encapsulants and heat treatments from 820 to 900°C have been used. Electrical activation was found to, depend critically on the substrate material. Si<inf>3</inf>N<inf>4</inf>-encapsulation gave slightly higher electrical activation than SiO<inf>2</inf>.

Characterization of WSix gate metal process for GaAs MESFET's

Abstract A WSi0.4 cosputtering process has been developed to provide a gate metallization for GaAs self-aligned MESFET devices. The deposition parameters were optimized to produce films with good interface stability during 800°C n+ implant activation anneal. The importance of the amorphous structure to serve as a good diffusion barrier is emphasized. Various analytical methods are employed to characterize the gate metal/GaAs interface. I–V diode measurements were used to characterize contact electrical properties such as barrier height and ideality factor. MESFETs with a very shallow channel implant (10 keV) were fabricated with a K-value of 510 mS/V·mm, thus the good stability of the Schottky contact to GaAs was confirmed.

Design considerations for planar Schottky barrier diodes

Abstract The cut-off frequency of the simplest planar Schottky diode on a uniformly doped n-layer of GaAs is derived. The theoretical results are given as functions of doping concentration and layer thickness with the specific contact resistance as parameter. An improved planar diode structure is presented with several short Schottky contact fingers connected in parallel. Experimental values ranging from 100 to 300 GHz agree with the calculated values when parasitic capacitances are taken into account.