Lou J. Somers

Model-driven design-space exploration for embedded systems: the octopus toolset

The complexity of todays embedded systems and their development trajectories requires a systematic, model-driven design approach, supported by tooling wherever possible. Only then, development trajectories become manageable, with high-quality, cost-effective results. This paper introduces the Octopus Design-Space Exploration (DSE) toolset that aims to leverage existing modeling, analysis, and DSE tools to support model-driven DSE for embedded systems. The current toolset integrates Uppaal and CPN Tools, and is centered around the DSE Intermediate Representation (DSEIR) that is specifically designed to support DSE. The toolset architecture allows: (i) easy reuse of models between different tools, while providing model consistency, and the combined use of these tools in DSE; (ii) domain-specific abstractions to support different application domains and easy reuse of tools across domains.

Formal Modeling and Scheduling of Datapaths of Digital Document Printers

We apply three different modeling frameworks -- timed automata ( Uppaal ), colored Petri nets and synchronous data flow -- to model a challenging industrial case study that involves an existing state-of-the-art image processing pipeline. Each of the resulting models is used to derive schedules for multiple concurrent jobs in the presence of limited resources (processing units, memory, USB bandwidth,..). The three models and corresponding analysis results are compared.

The EXSPECT Tool

With the tool Exspect one can design and simulate formal specifications of distributed systems by means of a formalism based on hierarchical colored Petri nets. A graphical tool set to support the specification process has been implemented. It consists of an editor that allows for hierarchical structuring, a type checker that verifies the rules of the type system and a simulator.

Analyzing execution traces : critical-path analysis and distance analysis

System designers make trade-offs between metrics of interest such as execution time, functional quality and cost to create a properly balanced system. Execution traces, which are sequences of timestamped start and end events of system tasks, are a general and powerful means to understand the system behavior that gives rise to these trade-offs. Such traces can be produced by, e.g., executable models or prototype systems. Their interpretation, however, often is non-trivial. We present two automated analysis techniques that work on execution traces to help the system designer with interpretation. First, critical-path analysis can be used to answer the typical “what is the bottleneck” question, and we extend earlier work of [16] with a technique that uses application information to refine the analysis. Second, we define a pseudo-metric on execution traces, which is useful for calibration and validation purposes, and which can be used to visualize the differences between traces. Both techniques are based on a common graph representation of execution traces. We have implemented our techniques in the Trace visualization tool [12], and have applied them in a case study from the digital printing domain.

Performance Engineering for Industrial Embedded Data-Processing Systems

Performance is a key aspect of many embedded systems, embedded data processing systems in particular. System performance can typically only be measured in the later stages of system development. To avoid expensive re-work in the final stages of development, it is essential to have accurate performance estimations in the early stages. For this purpose, we present a model-based approach to performance engineering that is integrated with the well-known V-model for system development. Our approach emphasizes model accuracy and is demonstrated using five embedded data-processing cases from the digital printing domain. We show how lightweight models can be used in the early stages of system development to estimate the influence of design changes on system performance.

Pattern detection in object-oriented source code

Pattern detection methods discover recurring solutions, like design patterns in object-oriented source code. Usually this is done with a pattern library. Hence, the precise implementation of the patterns must be known in advance. The method used in our case study does not have this disadvantage. It uses a mathematical technique, Formal Concept Analysis, and is applied to find structural patterns in two subsystems of a printer controller. The case study shows that it is possible to detect frequently used structural design constructs without upfront knowledge. However, even the detection of relatively simple patterns in relatively small pieces of software takes a lot of computing time. Since this is due to the complexity of the applied algorithms, applying the method to large software systems like the complete controller is not practical. It can be applied to its subsystems though, which are about 5-10% of its size.

Loop transformations leveraging hardware prefetching

Memory-bound applications heavily depend on the bandwidth of the system in order to achieve high performance. Improving temporal and/or spatial locality through loop transformations is a common way of mitigating this dependency. However, choosing the right combination of optimizations is not a trivial task, due to the fact that most of them alter the memory access pattern of the application and as a result interfere with the efficiency of the hardware prefetching mechanisms present in modern architectures. We propose an optimization algorithm that analytically classifies an algorithmic description of a loop nest in order to decide whether it should be optimized stressing its temporal or spatial locality, while also taking hardware prefetching into account. We implement our technique as a tool to be used with the Halide compiler and test it on a variety of benchmarks. We find an average performance improvement of over 40% compared to previous analytical models targeting the Halide language and compiler.

Performance Prediction for Families of Data-Intensive Software Applications

Performance is a critical system property of any system, in particular of data-intensive systems, such as image processing systems. We describe a performance engineering method for families of data-intensive systems that is both simple and accurate; the performance of new family members is predicted using models of existing family members. The predictive models are calibrated using static code analysis and regression. Code analysis is used to extract performance profiles, which are used in combination with regression to derive predictive performance models. A case study presents the application for an industrial image processing case, which revealed as benefits the easy application and identification of code performance optimization points.