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Dive into the research topics where Marc Geilen is active.

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Featured researches published by Marc Geilen.


international conference on application of concurrency to system design | 2006

SDF^3: SDF For Free

Sander Sander Stuijk; Marc Geilen; Twan Basten

SDF^3 is a tool for generating random Synchronous DataFlow Graphs (SDFGs), if desirable with certain guaranteed properties like strongly connectedness. It includes an extensive library of SDFG analysis and transformation algorithms as well as functionality to visualize them. The tool can create SDFG benchmarks that mimic DSP or multimedia applications.


international conference on formal methods and models for co design | 2006

A scenario-aware data flow model for combined long-run average and worst-case performance analysis

Bd Bart Theelen; Marc Geilen; Twan Basten; Jeroen Voeten; Stefan Valentin Gheorghita; Sander Sander Stuijk

Data flow models are used for specifying and analysing signal processing and streaming applications. However, traditional data flow models are either not capable of expressing the dynamic aspects of modern streaming applications or they do not support relevant analysis techniques. The dynamism in modern streaming applications often originates from different modes of operation (scenarios) in which data production and consumption rates and/or execution times may differ. This paper introduces a scenario-aware generalisation of the synchronous data flow model, which uses a stochastic approach to model the order in which scenarios occur. The formally defined operational semantics of a scenario-aware data flow model implies a Markov chain, which can be analysed for both long-run average and worst-case performance metrics using existing exhaustive or simulation-based techniques. The potential of using scenario-aware data flow models for performance analysis of modern streaming applications is illustrated with an MPEG-4 decoder example


european symposium on programming | 2003

Requirements on the execution of Kahn process networks

Marc Geilen; Twan Basten

Kahn process networks (KPNs) are a programming paradigm suitable for streaming-based multimedia and signal-processing applications. We discuss the execution of KPNs, and the criteria for correct scheduling of their realisations. In [12], Parks shows how process networks can be scheduled in bounded memory; the proposed method is used in many implementations of KPNs. However, it does not result in the correct behaviour for all KPNs. We investigate the requirements for a scheduler to guarantee both correct and bounded execution of KPNs and present an improved scheduling strategy that satisfies them.


Electronic Notes in Theoretical Computer Science | 2001

On the Construction of Monitors for Temporal Logic Properties

Marc Geilen

Abstract Temporal logic is a valuable tool for specifying correctness properties of reactive programs. With the advent of temporal logic model checkers, it has become an important aid for the verification of concurrent and reactive systems. In model checking the temporal logic properties are verified against models expressed in the tools modelling language. In addition, model-checking techniques are useful to test actual implementations or to verify models of the system that are too detailed to be analysed by a model checker, by means of, for instance, simulation. A tableau construction is an algorithm that translates a temporal logic formula into a finite-state automaton that accepts precisely all the models of the formula. It is a key ingredient to checking satisfiability of a formula as well as to the automata-theoretic approach to model checking. An improvement to the efficiency of tableau constructions has been the development of on-the-fly versions. In this paper, we present a particular tableau construction for the incremental analysis of execution traces during test, simulation or model-checking. The automaton forms the basis of a monitor that detects both good and bad prefix of a particular kind, namely those that are informative for the property under investigation. We elaborate on the construction of the monitor and demonstrate its correctness.


Archive | 2003

Ambient intelligence: impact on embedded system design

Twan Basten; Marc Geilen; Harmke de Groot

Foreword H. De Man. Omnia Fieri Possent T. Basten, M. Geilen, H. de Groot. Part I: Challenges. Embedded System Design Issues in Ambient Intelligence E. Aarts, R. Rovers. Ambient Intelligence: A Computational Platform Perspective L. Benini, M. Poncino. Ambient Intelligence and the Development of Embedded System Software A. Purhonen, E. Tuulari. Preparation of Heterogeneous Networks for Ambient Intelligence P. van der Stok. The Butt of the Iceberg: Hidden Security Problems of Ubiquitous Systems F. Stajano, J. Crowcroft. Emerging Challenges in Designing Secure Mobile Appliances S. Ravi, A. Raghunathan, J. -J. Quisquater, S. Hattangady. Part II: Developments. The Domestic Robot - A Friendly Cognitive System Takes Care of your Home F. Pirri, I. Mentuccia, S. Storri. QoS-based Resource Management for Ambient Intelligence C.M. Otero Perez, L. Steffens, P. van der Stok, S. van Loo, A. Alonso, J.E. Ruiz, R.J. Bril, M. Garcia Valls. Terminal QoS: Advanced Resource Management for Cost-Effective Multimedia Appliances in Dynamic Contexts J. Bormans, N. Pham Ngoc, G. Deconinck, G. Lafruit. Scalability and Error Protection - Means for Error-Resilient, Adaptable Image Transmission in Heterogeneous Environments A. Chirila-Rus, G. Lafruit, B. Masschelein. Metaprogramming Techniques for Designing Embedded Components for Ambient Intelligence V. Stuikys, R. Damasevicius. Application-Domain-Driven System Design for Pervasive Video Processing Z. Chamski, M. Duranton, A. Cohen, C. Eisenbeis, P Feautrier, D. Genius. Collaborative Algorithms for Communication in Wireless Sensor Networks T. Nieberg, S. Dulman, P. Havinga, L. van Hoesel, J. Wu. Energy-Efficient Communication for High Density Networks R. Min, A.Chandrakasan. Application Re-mapping for Fault-Tolerance in Ambient Intelligent Systems P. Stanley-Marbell, N.H. Zamora, D. Marculescu, R. Marculescu. Contributing Authors.


embedded software | 2004

Reactive process networks

Marc Geilen; Twan Basten

Data flow process networks are a good model of computation for streaming multimedia applications incorporating audio, video and/or graphics streams. Process networks are concurrent processes communicating streams of data through FIFO channels. They can be executed efficiently and determinately on multiprocessor platforms. However, such stream processing applications are becoming more dynamic, often requiring run-time reconfigurations. Moreover, stream processing is not always an application on its own, but may be a component of a larger application. This application, e.g. a game application, may be control oriented and event driven; events may interact with the streaming component and (re)configure it.In order to capture the interaction between reactive and streaming components as well as reconfiguration in dynamic stream processing, we introduce in this paper a formal, operational and compositional semantics of so-called reactive process networks. This operational semantics can serve as the basis for programming models that allow the programming of streaming components interacting with reactive system components and their reconfigurations. It also supports the construction of analysis and synthesis tools for dynamic streaming multimedia applications. It allows the integration of reactive behaviour in process networks as general as Kahn process networks, but it is also suitable for more restricted and efficient classes of process networks.


international conference on body area networks | 2010

A robust protocol stack for multi-hop wireless body area networks with transmit power adaptation

Majid Nabi; Twan Basten; Marc Geilen; Milos Blagojevic; Teun Hendriks

Wireless Body Area Networks (WBANs) have characteristic properties that should be considered for designing a proper network architecture. Movement of on-body sensors, low quality and time-variant wireless links, and the demand for a reliable and fast data transmission at low energy cost are some challenging issues in WBANs. Using ultra low power wireless transceivers to reduce power consumption causes a limited transmission range. This implies that a multi-hop protocol is a promising design choice. This paper proposes a multi-hop protocol for human body health monitoring. The protocol is robust against frequent changes of the network topology due to posture changes, and variation of wireless link quality. A technique for adapting the transmit power of sensor nodes at run-time allows to optimize power consumption while ensuring a reliable outgoing link for every node in the network and avoiding network disconnection.


leveraging applications of formal methods | 2010

Model-driven design-space exploration for embedded systems: the octopus toolset

Twan Basten; Emiel van Benthum; Marc Geilen; Martijn Hendriks; Fred Houben; Georgeta Igna; Fj Reckers; Sebastian de Smet; Lou J. Somers; Egbert Teeselink; N Nikola Trcka; Frits W. Vaandrager; Jacques Verriet; Marc Voorhoeve; Yang Yang

The complexity of todays embedded systems and their development trajectories requires a systematic, model-driven design approach, supported by tooling wherever possible. Only then, development trajectories become manageable, with high-quality, cost-effective results. This paper introduces the Octopus Design-Space Exploration (DSE) toolset that aims to leverage existing modeling, analysis, and DSE tools to support model-driven DSE for embedded systems. The current toolset integrates Uppaal and CPN Tools, and is centered around the DSE Intermediate Representation (DSEIR) that is specifically designed to support DSE. The toolset architecture allows: (i) easy reuse of models between different tools, while providing model consistency, and the combined use of these tools in DSE; (ii) domain-specific abstractions to support different application domains and easy reuse of tools across domains.


Computer Languages | 2001

Object-oriented modelling and specification using SHE

Marc Geilen; Jeroen Voeten; P.H.A. van der Putten; L.J. van Bokhoven; M.P.J. Stevens

Industry is facing a crisis in the design of complex hardware/software systems. Due to the increasing complexity, the gap between the generation of a product idea and the realisation of a working system is expanding rapidly. To manage complexity and to shorten design cycles, industry is forced to look at system-level languages towards specification and design. The (formal) system-level modelling language called POOSL is very expressive and is able to model dynamic hard real-time behaviour and to (visually) capture static (architecture and topology) structure in an object-oriented fashion. The language integrates a process part, based on the process algebra CCS, with a data part, based on the concepts of traditional object-oriented programming languages and it is equipped with a formal semantics. Currently, a number of automated software tools (model editing, simulator and compiler tools) are available in an environment called SHESim. These tools allow visual entry of structure and topology of the system, whereas dynamic behaviour of individual processes is expressed in an expressive imperative language. The formal semantics of POOSL provides a solid basis for the application of verification and performance analysis techniques and establishing a rigorous connection to existing analysis tools.


ACM Transactions in Embedded Computing Systems | 2013

Compositionality in synchronous data flow: Modular code generation from hierarchical SDF graphs

Stavros Tripakis; Dai N. Bui; Marc Geilen; Bert Rodiers; Edward A. Lee

Hierarchical SDF models are not compositional: a composite SDF actor cannot be represented as an atomic SDF actor without loss of information that can lead to rate inconsistency or deadlock. Motivated by the need for incremental and modular code generation from hierarchical SDF models, we introduce in this paper DSSF profiles. DSSF (Deterministic SDF with Shared FIFOs) forms a compositional abstraction of composite actors that can be used for modular compilation. We provide algorithms for automatic synthesis of non-monolithic DSSF profiles of composite actors given DSSF profiles of their sub-actors. We show how different tradeoffs can be explored when synthesizing such profiles, in terms of modularity (keeping the size of the generated DSSF profile small) versus reusability (maintaining necessary information to preserve rate consistency and deadlock-absence) as well as algorithmic complexity. We show that our method guarantees maximal reusability and report on a prototype implementation.Hierarchical SDF models are not compositional: a composite SDF actor cannot be represented as an atomic SDF actor without loss of information that can lead to rate inconsistency or deadlock. Motivated by the need for incremental and modular code generation from hierarchical SDF models, we introduce in this paper DSSF profiles. DSSF (Deterministic SDF with Shared FIFOs) forms a compositional abstraction of composite actors that can be used for modular compilation. We provide algorithms for automatic synthesis of non-monolithic DSSF profiles of composite actors given DSSF profiles of their sub-actors. We show how different trade-offs can be explored when synthesizing such profiles, in terms of compactness (keeping the size of the generated DSSF profile small) versus reusability (maintaining necessary information to preserve rate consistency and deadlock-absence) as well as algorithmic complexity. We show that our method guarantees maximal reusability and report on a prototype implementation.

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Twan Basten

Eindhoven University of Technology

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Jeroen Voeten

Eindhoven University of Technology

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Sander Sander Stuijk

Eindhoven University of Technology

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M.P.J. Stevens

Eindhoven University of Technology

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Majid Nabi

Eindhoven University of Technology

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Martijn Hendriks

Radboud University Nijmegen

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P.H.A. van der Putten

Eindhoven University of Technology

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Henk Corporaal

Eindhoven University of Technology

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Dip Goswami

Eindhoven University of Technology

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Amir R. B. Behrouzian

Eindhoven University of Technology

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