Lowell E. Clark

Characteristics of two-region saturation phenomena

Diffused base bipolar transistors, especially high-voltage types, often exhibit two pronounced saturation regions. This paper elucidates the qualitative and quantitative features of this behavior which is due to conductivity modulation of the lightly doped collector region. The transport equations for ambipolar conduction in the collector region are solved with a minimum of simplifying assumptions. It is shown how this portion of the solution explains the general features of the phenomenon. A complete solution for the collector V-I characteristics depends on an explicit knowledge of the recombination statistics in both the base and collector regions. A simple case is considered to demonstrate the detailed dependence of the phenomena on the physical structure. Design tradeoffs involved in the control of the V-I characteristics are discussed in the light of the results obtained from the analysis.

High current-density beta diminution

This paper discusses methods for discriminating among various possible current-gain falloff mechanisms at high current densities. It is shown that although various mechanisms can predominate, well designed silicon transistors are usually limited by emitter efficiency. This is demonstrated experimentally for a variety of structures and values are given for the emitter saturation current density. Design rules for tradeoffs among current gain, basewidth, and emitter stripewidth are adumbrated.

Experimental Determination of Gain Degradation Mechanisms

This paper presents and discusses experimental means for identifying the sources of neutron-induced base current in bipolar transistors. Several examples illustrate the predominant determinants of post-irradiation current gain, and the methods facilitate intercomparison of disparate devices. The techniques cited are equally applicable to the study of current-gain and recombination in unirradiated devices.

High-voltage termination using enhanced surface doping

A new technique using enhanced surface doping on the lightly-doped side of a p-n junction has been developed. The basic structure comprises a series of field-limiting rings lying in a high-resistivity region whose surface doping has been substantially enhanced. Capacitively-coupled floating field plates serve to reduce sensitivity to stray external charges. The enhanced surface doping serves to increase and control the punch- through voltage between the rings, thereby increasing the surface volts per micron obtainable versus standard ring terminations.

Optimum vertical design and evaluation techniques for high-current, high-voltage transistors

This paper discusses a quantitative design theory and new analysis techniques applicable to saturated switching power transistors. Methods for discriminating among various possible current-gain falloff mechanisms at high current densities are discussed in terms of easily measurable quantities allowing separation of the terminal currents in to physically meaningful components. The new analytical and experimental techniques presented allow rapidanalysis of any high current power transistor, allow characterization of various process sequences for their effects upon device performance, and allow optimal quantitative transistor design for a wide range of applications.

Optimized profiles for neutron and photocurrent hardened power transistors

This paper discusses two problems: the partitioning of bipolar transistor breakdown voltage between the collector and the base in the context of neutron tolerance, and the dependence of collector photocurrent on substrate doping. It is suggested that enhanced neutron tolerance for a given breakdown voltage may sometimes be achieved by increasing the basewidth so that a portion of the breakdown voltage is supported by the base. Peak current gains of ten were achieved with a four micron basewidth after exposure to 3 t 1014 neutrons (1 MeV eq.) cm−2. Substrate photocurrents were found to be very dependent on substrate doping; by using a substrate doping of 1020 cm−3, substrate photo-currents were suppressed to an equivalent silicon photocurrent collection length of three microns.

The influence of neutron radiation effects on the design of high-voltage power transistors

This paper describes the physical phenomena which must be considered in designing a practical neutron-hardened n-p-v-n power transistor. It is shown that, in addition to resistivity increase in the collector and lifetime decrease in the base region, one must also consider increases in emitter-base space-charge recombination and decreases in emitter efficiency to completely characterize the device degradation. The most practical design for a high-voltage neutron-hardened power transistor may be one in which the base is allowed to extend into the collector at high-current densities in order to reduce the saturation vo1tages. Data are given for a 5-ampere 100-volt BV CEO device tolerant to 3×1014neutrons/ cm2(E >10 keV, fission spectrum).

A packaged MOS power device with an integral protection chip

A packaged MOS power device having a protective integrated circuit mounted on the gate lead of the package is described. The protective circuit prevents gate overvoltage and provides for rapid gate discharge during commutation, overtemperature, or overvoltage in the on-state.<<ETX>>