Lv Hangbing

Effect of Pulse and dc Formation on the Performance of One-Transistor and One-Resistor Resistance Random Access Memory Devices

We investigate the effect of the formation process under pulse and dc modes on the performance of one transistor and one resistor (1T1R) resistance random access memory (RRAM) device. All the devices are operated under the same test conditions, except for the initial formation process with different modes. Based on the statistical results, the high resistance state (HRS) under the dc forming mode shows a lower value with better distribution compared with that under the pulse mode. One of the possible reasons for such a phenomenon originates from different properties of conductive filament (CF) formed in the resistive switching layer under two different modes. For the dc forming mode, the formed filament is thought to be continuous, which is hard to be ruptured, resulting in a lower HRS. However, in the case of pulse forming, the filament is discontinuous where the transport mechanism is governed by hopping. The low resistance state (LRS) can be easily changed by removing a few trapping states from the conducting path. Hence, a higher HRS is thus observed. However, the HRS resistance is highly dependent on the length of the gap opened. A slight variation of the gap length will cause wide dispersion of resistance.

Thermal effect on endurance performance of 3-dimensional RRAM crossbar array*

Three-dimensional (3D) crossbar array architecture is one of the leading candidates for future ultra-high density nonvolatile memory applications. To realize the technological potential, understanding the reliability mechanisms of the 3D RRAM array has become a field of intense research. In this work, the endurance performance of the 3D 1D1R crossbar array under the thermal effect is investigated in terms of numerical simulation. It is revealed that the endurance performance of the 3D 1D1R array would be seriously deteriorated under thermal effects as the feature size scales down to a relatively small value. A possible method to alleviate the thermal effects is provided and verified by numerical simulation.

Ultra-low RESET current RRAM device by side-RESET operation method

Resistive switching memory with low switching current is critical for low power application. In this work, we successfully demonstrated a four-terminal RRAM device with ultra-low switching current. The device is SET by one pair of electrodes and RESET by the other. Therefore, during RESET process, no current flows through the filaments, leading to an ultra-low switching current.