Lynne A. Slivovsky

Nanotechnology, Biology, Ethics and Society: Overcoming the Multidisciplinary Teaching Challenges

One of the inherent challenges of teaching any emerging technology like nanotechnology, is the fact that its core competencies flux in the new disciplines’ early stages. Nanotechnology presents an additional challenge in that its underpinnings cross multiple traditional disciplinary boundaries. We have designed a course that aims to address some of these challenges through a handful of structural features: team-based learning; a “reverse of the learning pyramid” approach; team-teaching; embedded information literacy techniques; and application-centered content. Our course is organized around four applications that are in their developmental stages: gold nanoshells for cancer treatment; molecular manufacturing; tissue engineering of a vital organ; and a microfluidic glucose sensor. These applications provide natural contexts for learning biology at the cellular level, the molecular level, the organ level and the biological systems level, respectively. They also provide natural contexts to introduce ideas of scientific uncertainty in emerging fields. In this paper, we will present the design features of our sophomore-level course Nanotechnology, biology, ethics and society and some preliminary

Work In Progress: Future Pedagogical Trends in the Microprocessor Course - The Soft Core Processor

The microprocessor course has been a keystone course in electrical and computer engineering curricula for decades now. Historically, commercial off-the-shelf processors such as the microchip PIC and Motorola 68HC12 have been used in this course. Following the migration from discrete components to programmable logic devices in introductory digital design courses we expect to see a similar, yet more selective, shift to the use of soft core processors in future microprocessor and embedded systems courses. Soft core processors are designed in a hardware description language (HDL) and implemented on a programmable logic device, typically a field programmable gate array (FPGA), and can be customized with respect to system requirements. Off-the-shelf processors cannot offer a customized computer system or the ability to design user-specified hardware as part of a system-on-a-chip. These aspects are the most advantageous characteristics of the soft core approach to embedded systems. Students themselves will design their platform using only the necessary peripherals. They will analyze system performance based on hardware and software tradeoffs against a backdrop of the utilization of hardware resources, thus vastly increasing the design space they consider for their projects. In this paper we support our claim by reviewing recent pedagogical trends and advances in the digital design industry

RFID in a Computer Engineering Capstone

The capstone experience for computer engineering students at Cal Poly, San Luis Obispo provides teams of students with, purposely undefined, design projects of significant scope. Students deal with a real customer and are expected to do a significant amount of independent learning during their time. Students learn of these things on the first day of a two-quarter capstone sequence. Students spend the remaining 19 weeks finding out precisely what they mean. Unique to the course is that it involves a substantial amount of independent learning. Past and current projects are in the area of radio frequency identification (RFID) yet students typically do not select RF and wireless courses as one of their three technical elective courses prior to the capstone sequence. They are therefore required to quickly come up to speed in the area. To this end, students are grouped into Knowledge Teams. Students are expected to become experts in their assigned topic and share their knowledge with other members of their project team and knowledge team. Knowledge teams give weekly oral presentations to the entire class and students write a large technical paper on the subject of their knowledge team. Desired outcomes from the independent learning and both oral and written communication in the capstone include increased technical competence, increased technical communication skills, and an understanding of the importance of lifelong learning. The capstone is currently in its second offering. Surveys administered to students in the first offering are largely in line with expected outcomes. An unexpected outcome, as the knowledge teams were initially formulated to increase technical competence, was that students reported an increase in the ability to work on teams

Capstone experiences: Effects of adapted physical activity design projects on attitudes and learning

Eight innovative senior level capstone engineering projects were completed at California Polytechnic State University (2008-present) involving (n=28) students (23 male/5 female). All projects involved the design of equipment to facilitate physical activity for people with disabilities. The effects on: i) learning design, ii) attitude towards people with disabilities, and iii) motivation to complete team design projects were analyzed through eight one-hour focus groups. This paper presents focus group findings using a constructivist approach and grounded theory to explore the overall student “learn by doing” experience. Results: (1) Approximately 19 (70%) of the students claimed the adapted physical activity project was their “first choice” given 60+ projects to rank; (2) Prior to the project only ten (35%) had experience working with people with disabilities and of those students the majority were women; (3) Twenty-six (92.8%) of the students were able to define ‘inclusion’ when asked and viewed the field of engineering as a ‘natural fit’ with project design for adapted physical activity. Students reported high levels of motivation for learning design as evidenced by the majority of engineers getting their “top” choice of projects; (4) Twenty-three (82%) of the engineers would ‘definitely’ consider a future engineering job in this sector and (5) Project challenges included: budget constraints, group communication, fabrication delays, detachment from client, and a desire for increased product testing time. Although students reported high levels of learning and motivation to complete their project; attitudes toward people with disabilities did not change significantly.

Work in progress - enhancing student-learning through state-of-the-art systems level design and implementation

The curriculum for undergraduate engineering programs is often partitioned into several courses that are taught in isolation followed by a single culminating senior design or capstone project experience. In the senior design class students begin to synthesize the knowledge and skills that they acquired through the engineering curriculum. This paper presents lower and upper division course and curricular changes made to accommodate learning objectives that better prepare students for project-based learning. These learning experiences and skills include: systems level design, experience with state-of-the art computer aided design (CAD) tools, printed circuit board (PBC) design, design for manufacturability, electronics assembly, project management, engineering ethics, and communication skills. Three upper division project based learning courses have been developed and are being offered this year. In addition, the development of laboratory tutorials and learning modules for the lower division engineering curriculum will introduce all engineering majors to current electronic manufacturing technology, and allow them to design electronic systems using PCBs. The courses and tutorial learning modules are currently being classroom tested and assessed.

FPGA-based artificial neural network using CORDIC modules

Artificial neural networks have been used in applications that require complex procedural algorithms and in systems which lack an analytical mathematic model. By designing a large network of computing nodes based on the artificial neuron model, new solutions can be developed for computational problems in fields such as image processing and speech recognition. Neural networks are inherently parallel since each neuron, or node, acts as an autonomous computational element. Artificial neural networks use a mathematical model for each node that processes information from other nodes in the same region. The information processing entails computing a weighted average computation followed by a nonlinear mathematical transformation. Some typical artificial neural network applications use the exponential function or trigonometric functions for the nonlinear transformation. Various simple artificial neural networks have been implemented using a processor to compute the output for each node sequentially. This approach uses sequential processing and does not take advantage of the parallelism of a complex artificial neural network. In this work a hardware-based approach is investigated for artificial neural network applications. A Field Programmable Gate Arrays (FPGAs) is used to implement an artificial neuron using hardware multipliers, adders and CORDIC functional units. In order to create a large scale artificial neural network, area efficient hardware units such as CORDIC units are needed. High performance and low cost bit serial CORDIC implementations are presented. Finally, the FPGA resources and the performance of a hardware-based artificial neuron are presented.

Engineers of the world unite: An integrated course on embedded systems and social movements

This paper presents the design, implementation, and reflections of students and faculty of an innovative integrated course (taught in Spring 2012) that combined seemingly disparate topics from engineering and the humanities. The primary goal of the course was to promote the growth of intrinsically motivated students who internalize the value of their technical work, connect their technical work to societal contexts, and cognitively engage in their own learning process. The faculty designed a high-level framework for the new integrated course on embedded systems and social movements by implementing an autonomy-supportive, context-rich engineering educational experience. This framework focused on several elements of course design: (1) identification of broad, competency-based learning goals for the integrated course block, (2) development of learning activities that supported broad goals such as communication, contextual awareness, and self-directed learning, and (3) selection of assessment methods aligned with broad competency goals and supportive of cross-disciplinary collaboration. Students were attracted to the self-direction designed into the course and reported greater awareness and understanding of the societal impacts of technology.

Work in progress - a unifying set of experiments for digital design I

Continual advances in technology necessitate ongoing updates and modifications to existing digital design laboratory experiments to ensure a quality, state-of-the-art lab experience for both students and instructors. Maintenance of laboratory material in this manner can obscure the original purpose of experiments, specifically in relation to learning objectives, as changes accumulate over time. Our Digital Design I laboratory is undergoing a transformation with a focus on four areas: continuity of experiments, system integration, independence from lecture, and instructor preparation. A set of experiments with a unifying theme introduces students to modular design techniques and system integration; students combine the results of weekly experiments into a single large design at the end of the quarter. Emphasis is placed ensuring that both the individual labs and final design represent real world applications. Self contained lab experiments with accompanying teaching materials ensure minimal prep time for instructors while providing students with necessary background information to understand and complete laboratory experiments. This paper presents an outline of the new course materials, describes how this new approach relates to course learning objectives, and provides preliminary assessment results comparing student performance in lecture for lab control and experimental groups

The role of collaborative inquiry in transforming faculty perspectives on use of reflection in engineering education

During the 2014-2015 academic year, engineering faculty members and students at California Polytechnic State University (Cal Poly) met monthly in a collaborative inquiry dialogue group to discuss the role of reflection in transforming engineering education. This project is part of the larger Consortium to Promote Reflection in Engineering Education (CPREE) headed by the University of Washington. In this paper we describe the activities of the Cal Poly group involved with CPREE and how these activities have transformed the thinking and actions of participants. Collaborative inquiry dialogue involves self-organizing individuals into a small group to address a compelling question through repeated cycles of experimentation and reflection on the results of that experimentation. In this context, the faculty members involved (including the authors of this paper) have been meeting to discuss how use of reflection in the classroom and/or in a collaborative inquiry dialogue amongst colleagues might lead to transformation in engineering education practice and outcomes. The dialogue group serves as a safe container that allows for the possibility of transformational insights by participants - insights that change their view of themselves, the world, and their relationship to it. Using a qualitative self-report methodology in the tradition of an action research paradigm, we (the authors) reflected on what we believed we had gained from the collaborative inquiry dialogues. Broadly we have noticed that participation in the collaborative inquiry dialogue has led us to reconsider what reflection is and what it could be, to develop a greater appreciation for the role of reflective practices in engineering education, and to better recognize when reflection is occurring (and when it might not be) such that reflective behaviors can be encouraged and practiced. We also began to challenge assumptions we had made about our teaching practices and have noted that the collaborative inquiry provides an environment in which development of new thinking is possible.

Carry Length Distribution Analysis for Self-Timed Asynchronous Adders

Due to the synchronization method employed by most modern digital circuits, the maximum propagation delay through an adder unit is typically used to set the system level delay for addition operations. The actual delay of a binary addition computation is fundamentally tied to the longest carry propagation chain created by certain input operands. Although the probability of lengthy carry propagation chains is quite low, modern synchronous adders devote a large portion of their silicon area and energy consumption to speeding up the propagation of carries through the adder. Therefore, considerable die area and system power must be spent optimizing the improbable worst case delay. Using asynchronous self-timed circuits, similar adder performance can be obtained at a fraction of the hardware cost and energy consumption. This paper shows the inadequacy of characterizing self-timed adder performance using the assumption that typical input operands are uniformly randomly distributed, and presents a new self-timed adder characterization benchmark based on the SpecINT 2000 benchmark suite. The SpecINT 2000 benchmark was selected since there is no published carry propagation chain distribution for this modern benchmark suite and the benchmark is well suited for measuring carry propagation chains due to its code size and the fact that it is a non-synthetic benchmark. All totaled, over 4.7 billion addition/subtraction operations resulting from address and data calculations were tabulated to create the SpecINT 2000 Carry Propagation Distribution. This new carry propagation distribution sheds light on the accuracy of existing distributions based on the Dhrystone integer benchmark and demonstrates how measuring self-timed adder performance with a uniformly random input distribution can overestimate self-timed adder performance by over 50 percent.