M. Doelle

Piezo-FET stress-sensor arrays for wire-bonding characterization

This paper reports the design, fabrication, and characterization of a two-dimensional stress-sensor array based on a stress-sensor element exploiting the transverse pseudo-Hall effect in metal-oxide-semiconductor (MOS) field effect transistors (FET). P-channel MOS (PMOS) devices were integrated in a 4/spl times/4 stress sensor array with a total area of 120/spl times/120 /spl mu/m/sup 2/. The individual elements of the array are sensitive to the local shear stress in the chip plane. They are selected using a CMOS integrated digital decoder and transmission gates. The new array was characterized using a commercial ball-wedge wire bonding tool and was used for the in situ monitoring of the bonding process. The spatially resolved measurement of the stress distribution underneath and close to a bond pad during the bond wire touch-down is demonstrated. The array is able to resolve variations in the touch-down position of 10 /spl mu/m. The time of 1.6 ms for acquisition of a full frame is currently limited by the experimental setup. To monitor the stress distribution during the bonding process, an aluminum covered stress sensor array similar to a standard bond pad was used. The successful bond formation between a gold ball and the metal bond pad was observed. The bond formation becomes evident as a characteristic, concentrated stress profile with large peak value appearing within 20 ms. The maximum stresses underneath the successfully bonded area exceeds stress levels in unbonded sensor locations by a factor of up to 60.

Sheet Resistance Determination Using Symmetric Structures With Contacts of Finite Size

This paper proposes an extension of van der Pauws celebrated method for the extraction of the sheet resistance Rsq of planar homogeneously conducting samples with four point-like contacts to symmetric samples with contacts of finite length. Using the method, Rsq can be extracted, e.g., from symmetric integrated Hall plates and stress sensors, without having to resort to dedicated van der Pauw structures. First, the analog of van der Pauws formula for arbitrarily shaped samples with four extended contacts separated by point-like insulations is derived. Based on this and van der Pauws original result, an interpolation formula applicable to symmetric samples with contacts of arbitrary length is constructed. The new formalism was successfully put to the test using ten widely differing CMOS sensor structures, with contacts covering between 10.1% and 91.3% of the device periphery. The extracted Rsq values lie within the range specified by the CMOS foundry used for the fabrication of the samples and show a relative standard deviation of 1.04%.

Two-dimensional high density piezo-FET stress sensor arrays for in-situ monitoring of wire bonding processes

This paper reports the design, fabrication, and characterization of a CMOS based two-dimensional stress sensor array. It is based on a stress sensor element exploiting the transverse pseudo-Hall effect in metal oxide semiconductor (MOS) field effect transistor (FET). In this work p-doped MOS devices (PMOS) were integrated in a 4/spl times/4 stress sensor array with a total area of only 120/spl times/120 /spl mu/m/sup 2/. The array is connected onchip to an analog multiplexer. The new device was used for the in-situ monitoring of a ball wedge wire bonding process. It gives access to position and force information. The piezo-FET sensor array was used to spatially resolve the stress distribution underneath and close to a bondpad. A sensitivity of the array to position variations of at least 5 /spl mu/m is demonstrated. Compared to previous stress sensor arrays the sensor density was increased by a factor of 22 and the number of required bondpads was reduced by a factor of 3.5.

A novel stress sensor based on the transverse pseudo-Hall effect of MOSFETs

This paper reports a novel stress sensor based on the transverse, i.e., pseudo-Hall response of metal oxide field effect transistor (MOSFET) devices to mechanical loads. In addition to source/drain contacts the MOSFETs investigated in this work feature additional perpendicular contacts to the channel region. Beside theoretical considerations, the paper covers experimental results of square MOSFETs with different lateral dimensions. Both NMOS and PMOS enhancement-mode devices are investigated. The dependence of the stress sensitivity on drain-source and gate-source voltages VDS and VGS was measured. Stress sensitivity coefficients /spl Pi//sub 44,n/ and /spl Pi//sub 44,p/ were extracted from these results.

Simultaneous and Independent Measurement of Stress and Temperature Using a Single Field-Effect Transistor Structure

This paper reports on the simultaneous and independent measurement of mechanical stress and temperature using p- and n-channel field-effect transistor structures with multiple drain/source contacts fabricated in a commercial complementary metal-oxide-semiconductor technology. The respective average stress sensitivities of of three p-channel devices and 66 of two n-channel devices at room temperature originate from the shear piezoresistance effect, also termed pseudo-Hall effect, of the inversion layer carriers. The stress sensitivities show very small average temperature coefficients (TCs) of 1127 and 431 ppm/K for the p- and n-channel devices, respectively. Temperature values were obtained from the temperature-dependent threshold voltage . Robust values were extracted from the second-order transconductance smoothed using a new variant of Tikhonovs regularization method. With both types of devices, the obtained by this procedure was found to be stress insensitive in the range of stresses from 0 to 20.4 MPa. Between 25 and 150 , depends linearly on temperature, with average slopes of 1.67 and for p- and n-channel devices, respectively. Device-to-device variations of the temperature sensitivity and its slope suggest the use of a two-point calibration. With only a one-point calibration, a temperature uncertainty of less than 3 over a temperature range of 100 is achieved.

CMOS-integrated silicon 3d force sensor system for micro component coordinate measurement machines

This paper reports a CMOS-integrated three-axial force sensor system realized using a post-CMOS compatible low-temperature fabrication process which allows to process single IC dies as obtained from multi-project wafer (MPW) runs. The sensor system can be applied in coordinate measurement machines used for three-dimensional metrology of microcomponents. It is based on a flexible micromechanical cross structure suspended through thin silicon membrane hinges in a silicon frame. The cross is realized using double-sided deep reactive ion etching of IC chips comprising field effect transistor based piezoresistive stress sensor elements integrated with on-chip circuitry. The sensor elements are located on the membrane hinges and detect the deformations of the cross structure upon forces applied to a tactile element. The sensor system is able to monitor out-of-plane deflections of the cross structure with a resolution of 33 nm.

Simultaneous and Independent Measurement of Stress and Temperature Using a Single Field Effect Transistor Based Sensor

This paper reports on the simultaneous and independent measurement of mechanical stress and temperature using a single field effect transistor with multiple source/drain contacts. A stress sensitivity of Sσ= -405 µ V/MPa V of the device originates from the shear piezoresistive effect, i.e. the pseudo-Hall effect. This sensitivity exhibits a very small temperature coefficient of only 914 ppm/K. Temperature values are acquired from the temperature dependence of the threshold voltage VTand extracted using a recently reported regularization method with a temperature sensitivity of SVT= -1.67 mV/K. We report VTto be stress independent in the measured range of 0 MPa to 15.6 MPa and in the temperature range of 25 ° C to 150 ° C.

Smart brush based on a high density CMOS stress sensor array and SU-8 microposts

This paper reports on a CMOS integrated stress sensor array combined with SU-8 posts fabricated on the chip surface. The chip contains an array of 1024 field effect transistor (FET)-based stress sensors occupying a total area of ca. 1 x 1 mm2. On-chip circuitry is used for sensor addressing, signal amplification, A/D conversion, signal processing, and serial bus communication. A novel scalable matrix-based sensor selection concept enables the integration of high-density stress sensor arrays with minimum wiring. The system significantly expands previous stress sensor arrays in terms of an increased number of sensors and reduced sensor pitch. An array of 8 x 8 circular SU-8 posts with a diameter of 62 mum and a height of 300 mum was fabricated on the CMOS chips. The new brush-like device was used for measuring vertical and horizontal force distributions.

Geometry dependent sensitivity of planar piezoresistive stress sensors based on the pseudo-Hall effect

This paper reports a systematic analysis of the geometry dependent sensitivity of planar piezoresistive stress sensors based on the shear piezoresistance effect, also termed pseudo-Hall effect. The analyzed geometry parameters are: (i) the shape of the device active area, (ii) its aspect ratio, and (iii) the location and size of input and output contacts. Further, the influence of insulating holes in the active device area was investigated. General design rules for the design of piezoresistive stress sensors with improved sensitivity were extracted. These results were obtained using a simulation approach combining affine mapping with the finite element method. The simulation program was tested by comparing simulation results with experimental data. The differences between simulated and measured results were between 1.2% and 3.3%. Novel optimized sensor geometries with insulating holes show simulated and measured sensitivities greatly improved by factors up to 2.30 and 2.39, respectively.