M. K. Kumar

Transparent, Well-Aligned TiO2 Nanotube Arrays with Controllable Dimensions on Glass Substrates for Photocatalytic Applications

Transparent, well-aligned TiO(2) nanotube arrays (NTAs) with controllable dimensions are grown on glass substrates via atomic layer deposition (ALD) of TiO(2) onto free-standing porous anodic alumina (PAA) templates. Photodegradation of aqueous methylene blue (MB) solution and solid stearic acid (SA) film using TiO(2) NTAs of various wall thicknesses are investigated. The Pd functionalized TiO(2) NTAs, with a wall thickness of 15 nm and height of 200 nm, has the highest photodegradation efficiency at 76% after 4 h of UV irradiation. These functionalized NTAs are able to photodegrade MB molecules completely as no obvious demethylated byproducts are observed during the process. It also demonstrates excellent photocatalytic activity for solid contaminants such as SA film. By using the ALD technique, the nanotube wall thickness can be precisely controlled so that it is sufficiently thin to be transparent while sufficiently thick for excellent photocatalytic performances. The transparent TiO(2) NTAs on glass substrates with excellent photocatalytic properties might have potential applications in self-cleaning coating, transparent electronics, and solar cells.

Atomic layer deposited (TiO2)x(Al2O3)1−x/In0.53Ga0.47As gate stacks for III-V based metal-oxide-semiconductor field-effect transistor applications

Atomic layer deposited (ALD) (TiO2)x(Al2O3)1-x(TiAlO) alloy gate dielectrics on In0.47Ga0.53As/InP substrates are shown to produce high quality interfaces between TiAlO and InGaAs. The surface morphology and interfacial reaction of nanolaminate ALD TiAlO on In0.53Ga0.47As are studied using atomic force microscopy and x-ray photoelectron spectroscopy. Measured valence and conduction band offsets are found to be 2.85 ± 0.05 and 1.25 ± 0.05 eV, respectively. Capacitance-voltage characteristics show low frequency dispersion (∼11%), interface state density (∼4.2 × 1011 cm−2eV−1), and hysteresis voltage (∼90 mV). Ga-O and As-O bonding are found to get suppressed in the gate stacks after post deposition annealing. Our experimental results suggest that higher oxidation states of In and Ga at the In0.53Ga0.47As surface and As diffusion in the dielectric are effectively controlled by Ti incorporation in Al2O3.

Conduction-atomic force microscopy study of H2 sensing mechanism in Pd nanoparticles decorated TiO2 nanofilm

In situ conduction-AFM is used to observe room temperature hydrogen gas response mechanism of Pd nanoparticles decorated TiO2 nanofilm. The response mechanism is due to chemical and electronic sensitization of the nanofilm. The nanofilm with thickness ∼5 nm, in range of the wall thickness of a typical TiO2 nanotube, is prepared by atomic layer deposition. For the mechanism study and also for hydrogen sensor applications, this nanofilm with electrical conduction switching from the order of picoampere in air, to ∼0.30 μA in 1000 ppm H2 is an alternative to TiO2 nanotube/nanostructures.

Interfacial and Electrical Characterization of Atomic-Layer-Deposited HfO2 Gate Dielectric on High Mobility Epitaxial GaAs/Ge Channel Substrates

Interfacial and electrical properties of atomic-layer-deposited HfO 2 gate dielectric on epitaxial GaAs (epi-GaAs)/Ge and bulk GaAs substrates have been investigated. Atomic layer deposition provides a unique opportunity to integrate high quality gate dielectrics on epi-GaAs. The cross-sectional transmission electron microscopy of a HfO 2 /III-V gate stack shows a similar interfacial layer thickness for HfO 2 on bulk p-GaAs and epi-GaAs substrates. However, X-ray photoelectron spectroscopy shows a Ga oxide-rich interfacial layer after postdeposition annealing at 500°C for films grown on epi-GaAs. Although the epi-GaAs surface is rough with nanoscale features, the electrical properties of the HfO 2 gate dielectric deposited on epi-GaAs are comparable with bulk p-GaAs-based devices. The Au/HfO 2 /epi-GaAs gate stack shows a low frequency dispersion (13%), hysteresis voltage (0.72 V), and a leakage current density of 2.1 X 10 ―3 A cm ―2 at V FB + 1 V (where FB is flatband) for an equivalent oxide thickness of 1.4 nm.

Characterization of epitaxial GaAs MOS capacitors using atomic layer-deposited TiO2/Al2O3 gate stack: study of Ge auto-doping and p-type Zn doping

Electrical and physical properties of a metal-oxide-semiconductor [MOS] structure using atomic layer-deposited high-k dielectrics (TiO2/Al2O3) and epitaxial GaAs [epi-GaAs] grown on Ge(100) substrates have been investigated. The epi-GaAs, either undoped or Zn-doped, was grown using metal-organic chemical vapor deposition method at 620°C to 650°C. The diffusion of Ge atoms into epi-GaAs resulted in auto-doping, and therefore, an n-MOS behavior was observed for undoped and Zn-doped epi-GaAs with the doping concentration up to approximately 1017 cm-3. This is attributed to the diffusion of a significant amount of Ge atoms from the Ge substrate as confirmed by the simulation using SILVACO software and also from the secondary ion mass spectrometry analyses. The Zn-doped epi-GaAs with a doping concentration of approximately 1018 cm-3 converts the epi-GaAs layer into p-type since the Zn doping is relatively higher than the out-diffused Ge concentration. The capacitance-voltage characteristics show similar frequency dispersion and leakage current for n-type and p-type epi-GaAs layers with very low hysteresis voltage (approximately 10 mV).PACS: 81.15.Gh.

Optical and Electrical Characterization of Atomic Layer Deposited (ALD) HfO2/p-GaAs MOS capacitors

The HfO2/p-GaAs metal-oxide-semiconductor (MOS) structures have been fabricated by developing and simulating an optimized process recipe. The optical dielectric constants and refractive indices of atomic-layer-deposited (ALD) HfO2 films and the GaAs substrate are extracted from spectroscopic ellipsometer (SE) measurements. The quality of interface and that of the ALD HfO2 films is investigated by analyzing capacitance-voltage (C-V) and conductance-voltage (G-V) data. Simulations of C-V and G-V data have also been performed for a similar process recipe to comprehensively understand the electrical quality of the dielectric layer. The optical dielectric constants for HfO2 and GaAs layers are obtained to be 4.5-3.6 and 10-25, respectively, while their refractive indices are obtained to be 2.12-1.89 and 3-5.2, respectively. A frequency dispersion of the C-V graphs is observed indicating the presence of a Ga2O3 interfacial layer which has been confirmed from the device simulation. A flat band voltage shift of − (0.68-1.05) eV and interface state density of (5×1011 - 1 ×1012) cm-2 eV-1 are obtained.

Sputter-Deposited ZrO2 Gate Dielectric on High Mobility Epitaxial-GaAs/Ge Channel Material for Advanced CMOS Applications

Sputtered-deposited ZrO2 gate dielectric on epitaxial-GaAs/Ge substrates have been studied for complementary-metal-oxide-semiconductor (CMOS) applications. The epitaxial-GaAs (epi-GaAs) on Ge susbstrates with AlGaAs interlayer was grown by metal-organic chemical vapor deposition at 650oC. High resolution transmission electron microscopy ((HRTEM) shows that the epilayers are free from arsenic anti-phase defects (APD). From secondary ion mass spectrometry, it was confirmed that the Ge diffusion is completely blocked by the AlGaAs layer and no Ge atoms are able to penetrate into the GaAs layer. The macroscopic surface roughness of epitaxial GaAs is ~5.3nm, whereas over 200x200nm is 0.4 nm, which is comparable with bulk GaAs. Althogh, the epi-GaAs has nano-scale surface features; the conduction-AFM shows electrically homogeneous surface. The electrical and interfacial properties of MOS capacitors with sputtered deposited ZrO2 dielectric on epitaxial-GaAs/Ge and bulk GaAs substrates were investigated. The frequency dispersion and hysteresis voltage for directly deposited ZrO2 on epi-GaAs is higher compared with bulk p-GaAs, however, it is comparable with bulk n-GaAs. The interfacial and electrical properties of ZrO2 on epi-GaAs have shown to exhibit better electrical characteristics after post deposition annealing (PDA) at 400oC. The apparent doping profile of the epitaxial layer is unchanged with PDA temperatures, which suggest the less cross-diffusion of Ge, Ga, and As during device fabrication. The degradation of the gate oxide quality and interface properties are mainly due to the high surface roughness of epitaxial layer and also presence of elemental out diffusion of Ga and As.