M. Mignone

A silicon pixel readout ASIC in CMOS 0.13 μm for the PANDA microvertex detector

The requirements for the PANDA Micro Vertex Detector in terms of track density and absence of a trigger signal lead to the need of a custom solution for the electronic readout of the silicon pixel detectors. A reduced scale prototype with two 128 cells and two 32 cells columns has been designed in a CMOS 0.13 μm technology and successfully tested. The ASIC measures the 2-D position, the hit arrival time and the charge released via a Time over Threshold technique.

A CMOS 0.13μm Silicon Pixel Detector Readout ASIC for the PANDA experiment

The ToPiX ASIC is a custom development for the hybrid pixel sensors of the PANDA experiment Micro Vertex Detector. The ASIC will provide both the time and amplitude informations (via the Time over Threshold technique) of the incoming particle. ToPiX will consist of a matrix of 116 × 110 cells with a pixel size of 100 × 100 μm2, the column readout logic and two 311 Mbit/s serializers. A reduced scale prototype in CMOS 0.13 μm has been designed and tested. The prototype includes eight columns with the full cell analogue and digital circuitry and the end of column readout.

The ToPiX v4 prototype for the triggerless readout of the PANDA silicon pixel detector

ToPiX v4 is the prototype for the readout of the silicon pixel sensors for the Micro Vertex Detector of the PANDA experiment. ToPiX provides position, time and energy measurement of the incoming particles and is designed for the triggerless environment foreseen in PANDA. The prototype includes 640 pixels with a size of 100 × 100 μm2, a 160 MHz time stamp distribution circuit to measure both particle arrival time and released energy (via ToT technique) and the full control logic. The ASIC is designed in a 0.13 μm CMOS technology with SEU protection techniques for the digital parts.

A free-running, time-based readout method for particle detectors

For the EndoTOFPET-US experiment, the TOFPET ASIC has been developed as a front-end chip to read out data from silicon photomultipliers (SiPM) [1]. It introduces a time of flight information into the measurement of a PET scanner and hence reduces radiation exposure of the patient [2]. The chip is designed to work with a high event rate up to 100 kHz and a time resolution of 50 ps LSB. Using two threshold levels, it can measure the leading edge of the event pulse precisely while successfully suppressing dark counts from the SiPM. This also enables a time over threshold determination, leading to a charge measurement of the signals pulse. The same, time-based concept is chosen for the PASTA chip used in the PANDA experiment. This high-energy particle detector contains sub-systems for specific measurement goals. The innermost of these is the Micro Vertex Detector, a silicon-based tracking system. The PASTA chips approach is much like the TOFPET ASIC with some differences. The most significant ones are a changed amplifying part for different input signals as well as protection for radiation effects of the high-radiation environment. Apart from that, the simple and general concept combined with a small area and low power consumption support the choice for using this approach.

A custom readout electronics for the BESIII CGEM detector

For the upgrade of the inner tracker of the BESIII spectrometer, planned for 2018, a lightweight tracker based on an innovative Cylindrical Gas Electron Multiplier (CGEM) detector is now under deve ...

The Cylindrical GEM Inner Tracker of the BESIII experiment: Prototype test beam results

A cylindrical GEM detector is under development, to serve as an upgraded inner tracker at the BESIII spectrometer. It will consist of three layers of cylindrically-shaped triple GEMs surrounding the interaction point. The experiment is taking data at the e+e− collider BEPCII in Beijing (China) and the GEM tracker will be installed in 2018. Tests on the performances of triple GEMs in strong magnetic field have been run by means of the muon beam available in the H4 line of SPS (CERN) with both planar chambers and the first cylindrical prototype. Efficiencies and resolutions have been evaluated using different gains, gas mixtures, with and without magnetic field. The obtained efficiency is 97–98% on single coordinate view, in many operational arrangements. The spatial resolution for planar GEMs has been evaluated with two different algorithms for the position determination: the charge centroid and the micro time projection chamber (μ-TPC) methods. The two modes are complementary and are able to cope with the asymmetry of the electron avalanche when running in magnetic field, and with non-orthogonal incident tracks. With the charge centroid, a resolution lower than 100 μm has been reached without magnetic field and lower than 200 μm with a magnetic field up to 1 T. The μ-TPC mode showed to be able to improve those results. In the first beam test with the cylindrical prototype, the detector had a very good stability under different voltage configurations and particle intensities. The resolution evaluation is in progress.

Single-event upset tests on the readout electronics for the pixel detectors of the PANDA experiment

The Silicon Pixel Detector (SPD) of the future PANDA experiment is the closest one to the interaction point and therefore the sensor and its electronics are the most exposed to radiation. The Total Ionizing Dose (TID) issue has been addressed by the use of a deep-submicron technology (CMOS 0.13 μm) for the readout ASICs. While this technology is very effective in reducing radiation induced oxide damage, it is also more sensitive to Single Event Upset (SEU) effects due to their extremely reduced dimensions. This problem has to be addressed at the circuit level and generally leads to an area penalty. Several techniques have been proposed in literature with different trade-off between level of protection and cell size. A subset of these techniques has been implemented in the PANDA SPD ToPiX readout ASIC prototypes, ranging from DICE cells to triple redundancy. Two prototypes have been tested with different ion beams at the INFN-LNL facility in order to measure the SEU cross section. Comparative results of the SEU test will be shown, together with an analysis of the SEU tolerance of the various protection schemes and future plans for the SEU protection strategy which will be implemented in the next ToPiX prototype.

Front end electronics for pixel detector of the PANDA MVD

ToPix 2.0 is a prototype in a CMOS 0.13 μm technology of the front-end chip for the hybrid pixel sensors that will equip the Micro-Vertex Detector of the PANDA experiment at GSI. The Time over Threshold (ToT) approach has been employed to provide a high charge dynamic range (up to 100 fC) with a low power dissipation (15 μW /cell). In an area of 100μm× 100μm each cell incorporates the analog and digital electronics necessary to amplify the detector signal and to digitize the time and charge information. The ASIC includes 320 pixel readout cells organized in four columns and a simplified version of the end of column readout.

ToPiX: A CMOS 0.13 µm silicon pixel readout ASIC for the PANDA experiment

The ToPiX ASIC is a custom development for the electronic readout of the silicon pixel detector for the PANDA experiment. The ASIC has to cope with a particle rate of up to 6.1 × 106 particles/s and with the absence of a trigger signal, thus dramatically increasing the amount of data to be transmitted. A reduced scale prototype with four 128 cells, four 32 cells columns, end of column logic and serial output has been designed in a CMOS 0.13 µm technology and tested. The ASIC measures both the hit arrival time and the charge released via a Time over Threshold technique.

The silicon pixel readout architecture for the Micro Vertex Detector of the PANDA experiment

The electronic readout architecture for the silicon pixel detector of the PANDA Micro Vertex Detector is presented. The pixels will provide occurrence time, position and energy information; moreover, no trigger signal is foreseen, thus leading to a huge amount of data to be transmitted. The foreseen readout system is based on a custom ASIC development, named ToPix, which provides time information via a time stamp synchronous with the 155.5MHz global clock signal and energy information via the Time Over Threshold technique. High speed serial links and early electrical to optical conversion are adopted to reduce the amount of cables and material.