M. Wilder

A fast shaping low power amplifier-comparator integrated circuit for silicon strip detectors

We have designed and tested a 64 channel amplifier-comparator integrated circuit on the Maxim SHPi bipolar process. The low power design, 840 /spl mu/W/channel, is intended for use as a frontend with high clock rate silicon strip detector systems. Peaking time at the comparator input is 20 ns, for good double pulse resolution, and noise is near optimum for the technology used. We have used the chip successfully in a proton beam test at KEK in Japan with a 40 MHz data clock. >

Beam test results of a 16 ps timing system based on ultra-fast silicon detectors

Abstract In this paper we report on the timing resolution obtained in a beam test with pions of 180xa0GeV/c momentum at CERN for the first production of 45xa0µm thick Ultra-Fast Silicon Detectors (UFSD). UFSD are based on the Low-Gain Avalanche Detector (LGAD) design, employing n-on-p silicon sensors with internal charge multiplication due to the presence of a thin, low-resistivity diffusion layer below the junction. The UFSD used in this test had a pad area of 1.7xa0mm 2 . The gain was measured to vary between 5 and 70 depending on the sensor bias voltage. The experimental setup included three UFSD and a fast trigger consisting of a quartz bar readout by a SiPM. The timing resolution was determined by doing Gaussian fits to the time-of-flight of the particles between one or more UFSD and the trigger counter. For a single UFSD the resolution was measured to be 34xa0ps for a bias voltage of 200xa0V, and 27xa0ps for a bias voltage of 230xa0V. For the combination of 3 UFSD the timing resolution was 20xa0ps for a bias voltage of 200xa0V, and 16xa0ps for a bias voltage of 230xa0V.

Efficiency and noise measurements of non-uniformly irradiated double-sided silicon strip detectors

Abstract We have investigated the efficiency and the noise occupancy of double-sided silicon strip detectors, which were subjected to non-uniform proton irradiation of fluences up to a maximum of equivalent 5 × 10 13 protons/cm 2 . The depletion voltages, varying over time due to controlled annealing, were close to zero on one end of the 6 cm strips and 190 V at the high radiation end. We determined the efficiency and noise occupancy on both n-side and p-side in a 106 Ru telescope, using a binary read-out system with 22 ns shaping time. The n-side exhibits superior performance after type inversion.

Evaluation of the radiation tolerance of SiGe heterojunction bipolar transistors under 24 GeV proton exposure

For the potential use in future high luminosity applications in high energy physics (HEP) [e.g., the Large Hadron Collider (LHC) upgrade], we evaluated the radiation tolerance of a candidate technology for the front-end of the readout application-specific integrated circuit (ASIC) for silicon strip detectors. The devices investigated were first-generation silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs). The current gain as a function of collector current has been measured at several stages: before and after irradiation with 24-GeV protons up to fluences of 1016 p/cm2, and after annealing at elevated temperature. The analog section of an amplifier for silicon strip detectors typically has a special front transistor, chosen carefully to minimize noise and usually requiring a larger current than the other transistors, and a large number of additional transistors used in shaping sections and for signal-level discrimination. We discuss the behavior of both kinds of transistors, with a particular focus on issues of noise, power, and radiation limitations

Signal-to-noise in silicon microstrip detectors with binary readout

We report the results of a beam test at KEK using double-sided AC-coupled silicon microstrip detectors with binary readout, i.e., a readout where the signals are discriminated in the front-end electronics and only the hit location as kept. For strip pitch between 50/spl mu/ and 200/spl mu/, we determine the efficiency and the noise background as function of threshold setting. This allows us to reconstruct the Landau pulse height spectrum and determine the signal/noise ratio. In addition, the threshold/noise ratio necessary for operation with low occupancy is determined. >

A fast shaping amplifier-comparator integrated circuit for silicon strip detectors

A 64-channel amplifier-comparator silicon strip detector fabricated on the Tekronix SHPi bipolar process is described. This device is particularly useful in high rate colliders with silicon strip vertex detection. This amplifier-comparator meets the performance goals for the ZEUS LPS. It has low noise, radiation resistance, very low power, and good stability, and is easy to use. The power use and noise are close to those needed in the SDC tracker for the SSC (Superconducting Super Collider). Circuit measurements show that the circuit will perform properly in its expected environment.<<ETX>>

Noise measurements on radiation-hardened CMOS transistors

The authors present a measurement of the spectral noise density of radiation-hardened CMOS transistors. The motivation of this work is the design of a low-power, low-noise frontend with fast shaping for a silicon microstrip tracking detector for the SSC (Superconducting Super Collider). NMOS and PMOS transistors with widths varying from 75 mu m to 1332 mu m and lengths of 1.2, 2.2 and 3.2 mu m produced by UTMC (United Technology Microelectronics Center) were subjected to total /sup 60/Co doses of up to 5 Mrad. Radiation effects on the transconductance and on both the white and the frequency-dependent noise are described.<<ETX>>

Beam tests of a double-sided silicon strip detector with fast binary readout electronics before and after proton-irradiation

Abstract A double-sided silicon strip detector with a radiation-tolerant design was fabricated and characterized in a sequence of beam tests at KEK using 4 GeV/ c pions. The detectors were combined with newly designed, fast, lower power, bipolar amplifier-shaper-discriminator chips and CMOS digital pipeline chips to record hit-no hit signals in the strips. Efficiencies, noise occupancies, and spatial resolutions were measured before and after the proton irradiation at an equivalent fluence of 1 × 10 14 p/cm 2 , depending on angle of track incidence and strip-pitches. The median pulse height distribution, derived from the threshold scans of the efficiency, allowed to extract the response of the detector. A 1 T magnetic field enabled us to determine the Hall mobilities of electrons and holes.

Noise determination in silicon micro strips

We report the study of amplifier noise on silicon micro strip detectors. We have used a fast, low noise amplifier-comparator VLSI chip with 22 ns shaping time developed for the LHC to determine the noise at the pre-amp as a function of strip length and strip geometry, i.e., interstrip capacitance and ohmic strip resistance. In addition, we have tested the noise in irradiated detectors. We have compared the results with simulations using SPICE.

Beam Test Of The SDC Double-sided Silicon Strip Detector

A beam test was executed to evaluate the behavior of the first prototype radiation-hard double-sided silicon microstrip sensor for the SDC silicon tracking system. Pions of 4 GeV/c in a test bcamline at KEK illuminated three planes of detectors. Thc signals wcrc amplified, shaped, and discriminated with TEKZ bipolar analog LSIs, and the on-off levels were sampled at l0MHz clock with CMOS digiwl LSIs, asynchronously with beam triggers. The detectors were rotated in null and 1 .O Tesla magnetic fields. The efficiencies were found to be 98-9996. The position resolutions were 12.5pm. where the multi-strip hit fraction was 30-40%. There was no essential difference in the performance of the pand the n-sides. The multi-strip hit fraction showed a clear rotation and magnetic-field dependence. From the angles where the fractions were minimum in the 1T magnetic field, the Hall mobilities of the electrons and holes were obtained to be 1391k43 (clcctrons) and 325f30 (holes) cm2/Vs.