Makoto Kiyama

Extremely Low On-Resistance and High Breakdown Voltage Observed in Vertical GaN Schottky Barrier Diodes with High-Mobility Drift Layers on Low-Dislocation-Density GaN Substrates

Vertical GaN Schottky barrier diodes (SBDs) were fabricated on freestanding GaN substrates with low dislocation density. High quality n-GaN drift-layer with an electron mobility of 930 cm2 V-1 s-1 was obtained by optimizing the growth conditions by reducing the intensity of yellow luminescence using conventional photoluminescence measurements. The specific on-resistance (RonA) and the breakdown voltage (VB) of the SBDs were 0.71 mΩ cm2 and over 1100 V, respectively. The figure of merit (VB2/RonA) was 1.7 GW/cm2, which is the highest value among previously reported SBDs for both GaN and SiC.

Novel Vertical Heterojunction Field-Effect Transistors with Re-grown AlGaN/GaN Two-Dimensional Electron Gas Channels on GaN Substrates

Novel vertical heterojunction field-effect transistors (VHFETs) with re-grown AlGaN/GaN two-dimensional electron gas (2DEG) channels on free-standing GaN substrates have been developed. The VHFETs exhibited a specific on-resistance (RonA) of 7.6 mΩ cm2 at a threshold voltage (VTH) of -1.1 V and a breakdown voltage (VB) of 672 V. The breakdown voltage and the figure of merit (VB2/RonA) are the highest among those of the GaN-based vertical transistors ever reported. It was demonstrated that the threshold voltage can be controlled by the thickness of AlGaN layers and a normally-off operation was achieved with a 10-nm-thick Al0.2Ga0.8N layer.

Fast recovery performance of vertical GaN Schottky barrier diodes on low-dislocation-density GaN substrates

Vertical GaN Schottky barrier diodes (SBDs) were fabricated on free-standing GaN substrates with low dislocation density. Vertical GaN-SBDs with a forward current of 5A and a blocking voltage of 600V exhibit the most superior reverse recovery characteristics among GaN, SiC, and Si diodes. We also confirmed stable forward and reverse aging characteristics for 1000 hours at 150 °C.

Heat-Treatment Study of Deep-Level Defects in Semi-Insulating Liquid-Encapsulated Czochralski Gallium Arsenide Substrates

Deep-level defects in semi-insulating (S.I.) liquid-encapsulated Czochralski (LEC) GaAs substrates were studied using the thermally stimulated current (TSC) technique. From the heat-treatment temperature dependence of the TSC signal intensity and electrical properties, the thermal behavior of the detected defects with respect to the heat treatment and their correlation to the electrical properties of the substrate were clarified for the first time. The change in the resistivity was closely related to the changes in the TSC signal intensity of T3 (trap depth: 0.31 eV), T6 (0.58 eV) and T x (0.29 eV). The net concentration of these defects changed by 4×1014 cm-3 after heat treatment at 800°C, leading to a threefold increase of the resistivity. Precise thermal control of substrates is very important for consistently obtaining high-quality GaAs substrates.

High-Breakdown-Voltage GaN Vertical Schottky Barrier Diodes with Field Plate Structure

Gallium nitride (GaN) vertical Schottky barrier diodes (SBDs) with a SiNx field plate (FP) structure on low-dislocation-density GaN substrates have been designed and fabricated. We have successfully achieved the SBD breakdown voltage (Vb) of 680V with the FP structure, in contrast to that of 400V without the FP structure. There was no difference in the forward current-voltage characteristics with a specific on-resistance (Ron) of 1.1mcm2. The figure of merit V2b/Ron of the SBD with the FP structure was 420MWcm-2. The FP structure and the high quality drift layers grown on the GaN substrates with low dislocation densities have greatly contributed to the obtained results.

Thermoelastic Analysis of Slip Defect Generation on GaAs Wafers.

In this work we develop the thermoelastic analysis for prediction of slip defect generation on (001) GaAs wafers, by means of the finite element method taking into account the anisotropic structure and slip system of dislocation. The analysis for a completely circular wafer predicts that longer slip defect lines are generated at the wafer edge of θ=π/8+Δ+nπ/2, 3π/8-Δ+nπ/2 (Δ is about 3°) and the prediction well agrees with the result of the wafer heating experiment. This demonstrates that our anisotropic analysis is more accurate than simple isotropic analysis which predicts slip defect generation at the wafer edge of θ=π/8+nπ/4. According to this thermoelastic analysis, we can additionally confirm that longer slip defect lines are more prone to be generated at the orientation flat (OF) edge than at the circular edge. Finally, we suggest the method of preventing slip defect generation.

Characterization of Interface in GaAs Epitaxial Wafer by Spatially Resolved Photoluminescence from Cleaved Face

We characterized the interface between the epitaxial layer and substrate of a GaAs wafer by measuring the microscopic photoluminescence (PL) on the cleaved face of the wafer. The intensity of the band-edge PL was higher in the epitaxial layer than in the substrate and locally decreased at the interface. This finding indicates that the non-radiative recombination centers are accumulated at the interface.

Novel RTA technique for large diameter GaAs wafers managing to minimize both dopant diffusion and slip formation

Rapid thermal annealing (RTA) is useful for shallow channel device fabrication because of suppression of dopant diffusion. However, short RTA sequence easily causes slip formation due to thermal stress during the process, which is more serious in the case of larger diameter wafers. We investigated at what point slip generated during RTA by monitoring temperature distribution within a wafer and successfully suppress slip formation by introducing a waiting step in the cooling process while maintaining the high cooling rate and the abrupt doping profile.