Marcel A. Verheijen

Twinning superlattices in indium phosphide nanowires

Semiconducting nanowires offer the possibility of nearly unlimited complex bottom-up design, which allows for new device concepts. However, essential parameters that determine the electronic quality of the wires, and which have not been controlled yet for the III–V compound semiconductors, are the wire crystal structure and the stacking fault density. In addition, a significant feature would be to have a constant spacing between rotational twins in the wires such that a twinning superlattice is formed, as this is predicted to induce a direct bandgap in normally indirect bandgap semiconductors, such as silicon and gallium phosphide. Optically active versions of these technologically relevant semiconductors could have a significant impact on the electronics and optics industry. Here we show first that we can control the crystal structure of indium phosphide (InP) nanowires by using impurity dopants. We have found that zinc decreases the activation barrier for two-dimensional nucleation growth of zinc-blende InP and therefore promotes crystallization of the InP nanowires in the zinc-blende, instead of the commonly found wurtzite, crystal structure. More importantly, we then demonstrate that we can, once we have enforced the zinc-blende crystal structure, induce twinning superlattices with long-range order in InP nanowires. We can tune the spacing of the superlattices by changing the wire diameter and the zinc concentration, and we present a model based on the distortion of the catalyst droplet in response to the evolution of the cross-sectional shape of the nanowires to quantitatively explain the formation of the periodic twinning.

Bright single-photon sources in bottom-up tailored nanowires

The ability to achieve near-unity light-extraction efficiency is necessary for a truly deterministic single-photon source. The most promising method to reach such high efficiencies is based on embedding single-photon emitters in tapered photonic waveguides defined by top-down etching techniques. However, light-extraction efficiencies in current top-down approaches are limited by fabrication imperfections and etching-induced defects. The efficiency is further tempered by randomly positioned off-axis quantum emitters. Here we present perfectly positioned single quantum dots on the axis of a tailored nanowire waveguide using bottom-up growth. In comparison to quantum dots in nanowires without waveguides, we demonstrate a 24-fold enhancement in the single-photon flux, corresponding to a light-extraction efficiency of 42%. Such high efficiencies in one-dimensional nanowires are promising to transfer quantum information over large distances between remote stationary qubits using flying qubits within the same nanowire p–n junction.

Direct Band Gap Wurtzite Gallium Phosphide Nanowires

The main challenge for light-emitting diodes is to increase the efficiency in the green part of the spectrum. Gallium phosphide (GaP) with the normal cubic crystal structure has an indirect band gap, which severely limits the green emission efficiency. Band structure calculations have predicted a direct band gap for wurtzite GaP. Here, we report the fabrication of GaP nanowires with pure hexagonal crystal structure and demonstrate the direct nature of the band gap. We observe strong photoluminescence at a wavelength of 594 nm with short lifetime, typical for a direct band gap. Furthermore, by incorporation of aluminum or arsenic in the GaP nanowires, the emitted wavelength is tuned across an important range of the visible light spectrum (555–690 nm). This approach of crystal structure engineering enables new pathways to tailor materials properties enhancing the functionality.

Ultrahigh Capacitance Density for Multiple ALD-Grown MIM Capacitor Stacks in 3-D Silicon

ldquoTrenchrdquo capacitors containing multiple metal-insulator-metal (MIM) layer stacks are realized by atomic-layer deposition (ALD), yielding an ultrahigh capacitance density of 440 at a breakdown voltage VDB > 6 V. This capacitance density on silicon is at least 10times higher than the values reported by other research groups. On a silicon substrate containing high-aspect-ratio macropore arrays, alternating MIM layer stacks comprising high-k Al2O3dielectrics and TiN electrodes are deposited using optimized ALD processing such that the conductivity of the TiN layers is not attacked. Ozone annealing subsequent to each Al2O3 deposition step yields significant improvement of the dielectric isolation and breakdown properties.

Island growth in the atomic layer deposition of zirconium oxide and aluminum oxide on hydrogen-terminated silicon: Growth mode modeling and transmission electron microscopy

Atomic layer deposition (ALD) is used in applications where inorganic material layers with uniform thickness down to the nanometer range are required. For such thicknesses, the growth mode, defining how the material is arranged on the surface during the growth, is of critical importance. In this work, the growth mode of the zirconium tetrachloride∕water and the trimethyl aluminum∕water ALD process on hydrogen-terminated silicon was investigated by combining information on the total amount of material deposited with information on the surface fraction of the material. The total amount of material deposited was measured by Rutherford backscattering, x-ray fluorescence, and inductively coupled plasma–optical emission spectroscopy, and the surface fractions by low-energy ion scattering. Growth mode modeling was made assuming two-dimensional growth or random deposition (RD), with a “shower model” of RD recently developed for ALD. Experimental surface fractions of the ALD-grown zirconium oxide and aluminum oxid...

Controlling the fixed charge and passivation properties of Si(100)Al2O3 interfaces using ultrathin SiO2 interlayers synthesized by atomic layer deposition

Al2O3 synthesized by atomic layer deposition (ALD) on H-terminated Si(100) exhibits a very thin (∼1 nm) interfacial SiOx layer. At this interface, a high fixed negative charge density, Qf, is present after annealing which contributes to ultralow surface recombination velocities  ∼5 nm), the polarity of the effective charge density changed from negative to positive. The observed changes in Qf and the associated field-effect passivation had a significant influence on the injection-level-dependent minority carrier lifetime of Si.

Surface passivated InAs/InP core/shell nanowires

We report the growth and characterization of InAs nanowires capped with a 0.5–1 nm epitaxial InP shell. The low-temperature field-effect mobility is increased by a factor 2–5 compared to bare InAs nanowires. We extract the highest low-temperature peak electron mobilities obtained for nanowires to this date, exceeding 20 000 cm2 V s?1. The electron density in the nanowires, determined at zero gate voltage, is reduced by an order of magnitude compared to uncapped InAs nanowires. For smaller diameter nanowires we find an increase in electron density, which can be related to the presence of an accumulation layer at the InAs/InP interface. However, compared to the surface accumulation layer in uncapped InAs, this electron density is much reduced. We suggest that the increase in the observed field-effect mobility can be attributed to an increase of conduction through the inner part of the nanowire and a reduction of the contribution of electrons from the low-mobility accumulation layer. Furthermore the shell around the InAs reduces the surface roughness scattering and ionized impurity scattering in the nanowire.

Efficiency Enhancement of InP Nanowire Solar Cells by Surface Cleaning

We demonstrate an efficiency enhancement of an InP nanowire (NW) axial p-n junction solar cell by cleaning the NW surface. NW arrays were grown with in situ HCl etching on an InP substrate patterned by nanoimprint lithography, and the NWs surfaces were cleaned after growth by piranha etching. We find that the postgrowth piranha etching is critical for obtaining a good solar cell performance. With this procedure, a high diode rectification factor of 10(7) is obtained at ±1 V. The resulting NW solar cell exhibits an open-circuit voltage (Voc) of 0.73 V, a short-circuit current density (Jsc) of 21 mA/cm(2), and a fill factor (FF) of 0.73 at 1 sun. This yields a power conversion efficiency of up to 11.1% at 1 sun and 10.3% at 12 suns.

The role of surface energies and chemical potential during nanowire growth

We present an approach to quantitatively determine the magnitudes and the variation of the chemical potential in the droplet (Δμ), the solid-liquid (γ(SL)) and the liquid-vapor (γ(LV)) interface energies upon variation of the group III partial pressure during vapor-liquid-solid-growth of nanowires. For this study, we use GaP twinning superlattice nanowires. We show that γ(LV) is the quantity that is most sensitive to the Ga partial pressure (p(Ga)), its dependence on p(Ga) being three to four times as strong as that of γ(SL) or Δμ, and that as a consequence the surface energies are as important in determining the twin density as the chemical potential. This unexpected result implies that surfactants could be used during nanowire growth to engineer the nanowire defect structure and crystal structure.

Position-controlled epitaxial III-V nanowires on silicon

We show the epitaxial integration of III–V semiconductor nanowires with silicon technology. The wires are grown by the VLS mechanism with laser ablation as well as metal–organic vapour phase epitaxy. The hetero-epitaxial growth of the III– Vn anowires on silicon was confirmed with x-ray diffraction pole figures and cross-sectional transmission electron microscopy. We show preliminary results of two-terminal electrical measurements of III–V nanowires grown on silicon. E-beam lithography was used to predefine the position of the nanowires. (Some figures in this article are in colour only in the electronic version)