Marco Ronchi

MIMO OFDM Physical Layer Real-Time Prototyping

Emerging wireless communication systems are rapidly moving toward Multiple-Input Multiple-Output (MIMO) technologies to guarantee either robustness and throughput as required by current broadband applications. Targeting a solution easy to integrate, MIMO technology can be conveniently adopted in combination with the largely known Orthogonal Frequency Division Multiplexing (OFDM), a modulation scheme combining high spectral efficiency with low complexity. MIMO and OFDM are the Physical (PHY) layer technologies selected by IEEE to drive the evolution of current Wireless-LAN 802.11 standards. Starting from a template architecture definition, a flexible MIMO W-LAN PHY layer based on IEEE 802.11n draft standard has been implemented and validated on a commercial FPGA-based prototyping platform embedding RF cards to prove on-air real-time capabilities. The overall RTL design has been then synthesized for the STMicroelectronics CMOS low-power 65 nm technology.

Low-power 3 rd order ΣΔ modulator in CMOS 90-nm for sensor interface applications

The manuscript describes the design and implementation of a low-power, fully differential switched-capacitor ΣΔ modulator in STM 90-nm CMOS technology, for sensor interface applications. With the aid of an accurate behavioral model, the power consumption is minimized without sacrificing the effective resolution. Through the optimization of single-stage integrators, with feed-forward summation, and using a class-A OTA op-amp with local positive feedback, a total power consumption of 50-μW from a 1.2-V power supply is achieved. The modulator reaches a peak SNR of 94-dB and a noise floor of 8.6-μV-rms over a 250-Hz signal bandwidth. The proposed design is one of the first modulator implemented in a 90-nm CMOS and achieving a 16-bit effective resolution with a 1.5-pJ/conv. figure-of-merit.