Marcos Funes

Novel stepper motor controller based on FPGA hardware implementation

This paper proposes a novel stepper motor controller based on field programable gate arrays, showing a remarkable performance. The system provides a combination between a novel algorithm and programmable logic to achieve both high speed and high precision on a compact hardware.

Current Control for High-Dynamic High-Power Multiphase Buck Converters

When it comes to high-power current sources, multiphase buck converters become an attractive alternative to deliver high currents. However, large variations in current reference or load voltage lead to disturbances that require high dynamics in the transitory response of current control. This letter presents a current control for high-dynamic, high-power multiphase buck converters. The control proposed is based on the synchronization of zero-crossing current ripples with a time reference pattern. This control forces a correct interleaving and is capable of responding, with a reduced transitory time, to major changes in current reference and load voltage. Experimental results validate the proposal.

Characterization of Steady-State Current Ripple in Interleaved Power Converters Under Inductance Mismatches

Interleaved power converters are used in high-current applications due to their inherent reduction of semiconductors stress and total ripple. Ripple reduction is accomplished by a correct phase shifting, and the filtering improvement explained by the increase in the ripple frequency. However, these benefits are wasted, among other reasons, by the mismatch of the phase inductor value. As a consequence, differences in the ripple amplitude among phases are produced, leading to a total current ripple significantly greater than the ideal case, the loss of the cancellation points and the generation of the switching frequency component and its harmonics. The works dealing with this subject matter have focused on particular cases, such as a given number of phases, a specific converter topology, or a particular case of inductance mismatch, disregarding a general analytical approach. This paper proposes an analytical method to characterize the total ripple in steady state as a function of the duty cycle and the number of phases under any condition on inductance mismatch. Experimental results validate the proposed method.

Implementation of a novel synchronization method using Sliding Goertzel DFT

This work presents a synchronization method based on the implementation of a sliding-window digital-filter that uses the Goertzel algorithm. The proposed method filters the incoming power grid signal and specifies the input frequency by measuring the period of the output phase. The sampling frequency is adjusted to correct the phase errors introduced by the filter whenever variations in the frequency occur. Regardless of the magnitude of the input frequency variations, this method determines the input frequency with high accuracy.

Optimized Implementation of a Current Control Algorithm for Multiphase Interleaved Power Converters

Multiphase converters have become an attractive alternative for high-current power converters due to their inherent reduction of semiconductor stress. Additionally, total current ripple frequency can be increased and its amplitude decreased by the phases ripple interleaving. These converters require a different number of phases and control specifications depending on the application. A wide range of applications imposes challenging requirements in the control algorithm and its implementation, such as digital platforms and resources optimization. A previous proposal presented a current control algorithm developed to provide a solution to the highly demanding constraints present in high-power applications, where short settling times are required when fast transients in the current reference or the load voltage are present. This work presents the implementation of the above-mentioned algorithm and its optimizations, aimed to obtain a modular and efficient design. The proposed implementation and system scalability are evaluated by means of an experimental setup.

Interleaved Current Control for Multiphase Converters With High Dynamics Mean Current Tracking

This paper presents a current control for high-power multiphase converters, where fast and precise current reference tracking is required, and limited switching frequency is present. The proposed control is based on a synchronization signal and current error comparison bands per phase. The control calculates the switching time that adjusts the phase current error zero-crossing points with the synchronization signal to control the current mean value and provide the correct phase shift among phases. The aforementioned comparison bands allow us to determine the current error slopes required to calculate the switching instants. This methodology permits the precise current reference tracking regardless the load voltage and the voltage drop in the semiconductor devices and in the series resistance of the phase inductors. Additionally, band-crossing information allows the fast detection of major changes in the current error, and the optimal system behavior decision, minimizing the transient time. Furthermore, the current control is stable in the complete duty cycle range, which is evaluated by means of a small-signal model. Experimental tests on a low-scale four-phase buck converter validate the proposal.

Simultaneous correlation of complementary set of sequences using a transpose generation approach

Complementary sets of sequences are currently being applied to signal coding, radar, and multi-user systems, among others. Their particular mathematical properties make them adequate for multi-emission and noisy environments. Nowadays sustained efforts are being devoted to reduce the calculations involved in the generation and/or correlation of these signals by means of recursive algorithms. Some authors have proposed efficient algorithms that are based on modular architectures made up of adders, multipliers and delays. This work introduces a new approach to correlation algorithms of complementary sets of sequences, which is based on a transposition of the generation process. This approach allows to notoriously reduce calculations, and enables the simultaneous correlation of M sequences, without adopting time multiplexing schemes or complex parallel implementations. The correlation algorithm is theoretically demonstrated and its calculation performance is evaluated in a hardware reconfigurable platform. A comparison with other algorithms is included, considering the amount of calculations as a function of the length of the sequences.

Optimized Parameter Extraction Method for Photovoltaic Devices Model

A model that accurately reproduces the electrical behavior of photovoltaic (PV) devices becomes relevant, not only for cell, panel, array and system simulation, but also as an analysis tool that provides an insight of the internal physical mechanisms of PV devices. Consequently, a method based on genetic algorithms is proposed in this paper to obtain the parameters of the one-diode model of PV cells. The proposed method is applicable to I-V curves at several irradiation and temperature levels. Moreover, it simplifies the computation by adjusting the real data to the modeled one, without solving the transcendental equation that describes the current-voltage (I-V) characteristic. Additionally, the presented method combines two approaches; on the one hand, one that relies on the use of fitting algorithms that minimize the error for the entire set of data, and on the other, one that seeks minimization in selected I-V points (open-circuit, short-circuit and maximum power points ). In order to verify the validity of the method, an I-V curve is obtained out of the parameters previously determined and later compared with that offered by the panel manufacturer.

Steady state characterization of current ripple in DCM interleaved power converters

Power converters that operate in Discontinuous Conduction Mode (DCM) are able to reduce switching losses, when compared to Continuous Conduction Mode (CCM) operation. This reduction is mainly due to zero current commutation and the reduction of the reverse recovery losses. However, DCM operation in high power converters is limited due to the increment in current ripple, which increases losses and volume in the differential mode (DM) filter. Multiphase DCM power converters can reduce total ripple by dividing total current among N phases and interleaving its ripples. Nevertheless, magnitude of ripple reduction as a function of the system parameters has not yet been completely determined. This information would be an important performance indicator and a useful tool for aiding in the design of key converter features, such as the number of phases and DM filter design, in order to meet total ripple, losses or electromagnetic interference specifications. In this sense, this paper proposes a methodology for the steady state characterization of input and output ripple in both buck and boost converters operating in DCM. Experimental tests on a 4-phase buck converter validate the proposal.

Generation and correlation algorithms for ternary complementary pairs of sequences of length 3·2n

Binary complementary pairs of sequences, which are available for certain even length values L=2ni¾?10mi¾?26p, are very interesting for applications with high noise levels and/or highly attenuated signals. To extend the range of useful lengths, some authors have defined ternary complementary pairs of sequences. These sequences have been approached from a theoretical perspective, but further research should be conducted regarding the architectures to process them. This letter describes algorithms for generating and performing the correlation of these sequences using a minimum amount of calculations. These algorithms allow to work with sequences of length 3i¾?2n, making it possible to attain a wider range of lengths, and, as a consequence, a wider range of noise immunity in some applications. The proposed approach uses a particular delay arrangement that minimizes the memory requirements in hardware applications. The procedure described could also be used in ternary complementary pairs generated from primitives of length different from 3. Copyright