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Dive into the research topics where Marek A. Bawiec is active.

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Featured researches published by Marek A. Bawiec.


design automation conference | 2009

Boolean logic function synthesis for generalised threshold gate circuits

Marek A. Bawiec; Maciej Nikodem

This paper analyses negative differential resistance (NDR) based logic circuits operating in monostable-bistable transition logic element (MOBILE) regime. We formulate theoretical foundation for formal model of the generalised threshold gate (GTG) and prove that GTG can implement any, n-variable Boolean function. Moreover, we propose the algorithmic approach to GTG structure generation problem.


asia and south pacific design automation conference | 2010

Generalised threshold gate synthesis based on AND/OR/NOT representation of Boolean function

Marek A. Bawiec; Maciej Nikodem

This paper focuses on generalized threshold gates (GTGs) that implement boolean logic functions using elements with negative differential resistance (NDR). GTGs are capable of implementing boolean functions, however, no effective synthesis algorithms have been proposed so far. We present that GTGs can be effectively implemented using unate functions. Our synthesis algorithm ensures that the circuit implementing n variable boolean function consists of at most n+2 NDR elements and can be further optimized by reducing the number of switching elements.


computer aided systems theory | 2009

Resonant Tunnelling Diode-Based Circuits: Simulation and Synthesis

Marek A. Bawiec

In this present how to use SPICE for transient analysis of Boolean logic circuits based on monostable---bistable transition logic element (MOBILE). MOBILE circuit is composed of negative differential resistance (NDR) and takes advantages of negative resistance in I ? V characteristic of NDR. We also propose and verify a method how to construct NDRs library for SPICE. Our method generates GTG for a given Boolean function of up to n variables.


international conference on nanotechnology | 2010

Logic circuit synthesis using Threshold Gates based on nanodevices with negative differential resistance property

Maciej Nikodem; Marek A. Bawiec

Electronic circuits based on nanodevices and quantum effect can be the future of logic circuits design. Todays technology enables to construct nanodevices that are elementary components of threshold gates, however, constructing threshold gates given arbitrarily Boolean function is still a challenging task, with no efficient algorithms for some gate structures. This paper focuses on Generalised Threshold Gates (GTGs) and Multi Threshold Threshold Gates (MTTGs), giving the overview of threshold circuit synthesis. We present general structure of both circuits and describe ideas of different synthesis algorithms.


computer aided systems theory | 2015

Modeling Accuracy of Indoor Localization Systems

Tomasz Jankowski; Marek A. Bawiec; Maciej Nikodem

In recent years indoor localization systems and localization-based services gain more attention and become ubiquitous. Despite this, planning, development and deployment of localization systems and services is still an issue, that consumes a lot of effort and time. Situation may improve if efficient and accurate computer tools are available to support above mentioned tasks. This, on the other hand, requires modeling software that can numerically predict behavior of the system, recommend improvements and/or preform some optimization. This paper presents methods and preliminary results in the development of simplified, yet accurate, modeling tool that can support design and deployment of indoor localization system. Approaches presented were evaluated in real-life experiments.


ieee computer society annual symposium on vlsi | 2012

Synthesis of Multithreshold Threshold Gates

Maciej Nikodem; Marek A. Bawiec; Janusz Biernat

This paper presents novel synthesis algorithm capable of generating Multithreshold Threshold Gate (MTTG) structure for arbitrary Boolean function. Algorithm draws from dedicated efficient threshold decomposition procedure that represents Boolean function as a min/max composition of threshold functions. Since the proposed threshold decomposition procedure outputs minimal number of thresholds therefore the resulting gate is compact - for k-threshold n-input Boolean function at most (k+1)(n+1) NDR elements in a (k+1)-level gate structure, and (k+1)n transistors are required.


international conference on systems engineering | 2011

Synthesis of Generalised Threshold Gates and Multi Threshold Threshold Gates

Maciej Nikodem; Marek A. Bawiec; Janusz Biernat

We present formal models and efficient synthesis algorithms for threshold gates of Generalised Threshold Gate (GTG) and Multi Threshold Threshold Gate (MTTG) structures. For GTG synthesis our method does not require to calculate thresholds, that separate function onset and offsets, which greatly simplifies and speeds up the synthesis algorithm. For MTTG we propose a novel synthesis method that determines structure and circuit parameters efficiently. As complexity of MTTG circuit increases with number of thresholds we have developed a dedicated heuristic for efficiently determining the number of required thresholds. The number of resulting thresholds is smaller compared to the number of thresholds calculated using other methods.


computer aided systems theory | 2011

Synthesis of logic circuits based on negative differential resistance property

Marek A. Bawiec; Bartosz Wojciechowski; Maciej Nikodem; Janusz Biernat

This paper deals with negative differential resistance and its application to construction of threshold gates. We present evaluation of two synthesis algorithms for Generalised Threshold Gates and formulate properties and general steps of synthesis for Multi Threshold Threshold Gates.


Computer Networks and Isdn Systems | 2010

Negative Difference Resistance and Its Application to Construct Boolean Logic Circuits

Maciej Nikodem; Marek A. Bawiec; Tomasz Surmacz

Electronic circuits based on nanodevices and quantum effect are the future of logic circuits design. Today’s technology allows constructing resonant tunneling diodes, quantum cellular automata and nanowires/nanoribbons that are the elementary components of threshold gates. However, synthesizing a threshold circuit for an arbitrary logic function is still a challenging task where no efficient algorithms exist. This paper focuses on Generalised Threshold Gates (GTG), giving the overview of threshold circuit synthesis methods and presenting an algorithm that considerably simplifies the task in case of GTG circuits.


international workshop on thermal investigations of ics and systems | 2012

Practical Dynamic Thermal Management of multi-core microprocessors

Bartosz Wojciechowski; Marek A. Bawiec

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Maciej Nikodem

Wrocław University of Technology

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Janusz Biernat

Wrocław University of Technology

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Bartosz Wojciechowski

Wrocław University of Technology

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Tomasz Jankowski

Wrocław University of Technology

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Tomasz Surmacz

Wrocław University of Technology

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