Maria Cotorogea

Multi-dimensional trade-off considerations of the 750V micro pattern trench IGBT for electric drive train applications

The EDT2 750V uses a micro pattern trench cell with a narrow mesa for reducing the on-state losses with a tailored channel width for short circuit robustness. To account for high system stray inductances (Lstray) and currents for Full or Hybrid Electric Vehicle inverter applications, it features a 750V voltage rating compared to the predecessor IGBT3 650V by an optimized vertical structure and proper plasma shaping. This plasma distribution not only determines the performance tradeoff between on-state and switching losses, but at the same time defines the surge voltage for a given Lstray*I in the application as visualized in a switch-off loss vs. surge voltage trade-off diagram. Shaping of the feedback capacitance Cgc optimizes the tunability of the switching slopes by means of an external gate resistor for an easier adaption to a wider range of system inductances with low losses.

Predictive half-cell simulations of filament formation during IGBT turn-off

We present experimental data and simulation methods concerning the destruction of Insulated Gate Bipolar Transistors (IGBTs) during inductive turn-off when dynamic avalanche occurs. The influence of cell pitch and gate resistor on destruction is explored and the occurrence of current fllamentation is proposed to be a necessary condition for destruction. In order to validate this hypothesis, transient isothermal two-dimensional (2D) multi-cell simulations are performed. The simulation results reproduce the experimental results very well and reveal that the most critical conditions for fllamentation occur at that gate resistor value at which the discussed IGBT exhibits strongest avalanche generation. To replace the time demanding multi-cell simulations, an alternative simulation approach based on the occurrence of negative differential resistance in half-cell output characteristics is proposed and verified.