Marika Gunji

Atomic layer-deposited tunnel oxide stabilizes silicon photoanodes for water oxidation

A leading approach for large-scale electrochemical energy production with minimal global-warming gas emission is to use a renewable source of electricity, such as solar energy, to oxidize water, providing the abundant source of electrons needed in fuel synthesis. We report corrosion-resistant, nanocomposite anodes for the oxidation of water required to produce renewable fuels. Silicon, an earth-abundant element and an efficient photovoltaic material, is protected by atomic layer deposition (ALD) of a highly uniform, 2 nm thick layer of titanium dioxide (TiO(2)) and then coated with an optically transmitting layer of a known catalyst (3 nm iridium). Photoelectrochemical water oxidation was observed to occur below the reversible potential whereas dark electrochemical water oxidation was found to have low-to-moderate overpotentials at all pH values, resulting in an inferred photovoltage of ~550 mV. Water oxidation is sustained at these anodes for many hours in harsh pH and oxidative environments whereas comparable silicon anodes without the TiO(2) coating quickly fail. The desirable electrochemical efficiency and corrosion resistance of these anodes is made possible by the low electron-tunnelling resistance (<0.006 Ω cm(2) for p(+)-Si) and uniform thickness of atomic-layer deposited TiO(2).

Effects of catalyst material and atomic layer deposited TiO2 oxide thickness on the water oxidation performance of metal–insulator–silicon anodes

We report on the effects on water oxidation performance of varying (1) the nanoscale TiO2 thickness and (2) the catalyst material in catalyst/TiO2/SiO2/Si anodes. Uniform films of atomic layer deposited TiO2 are prepared in the thickness range ∼1–12 nm on degenerately-doped p+-Si, yielding water oxidation overpotentials at 1 mA cm−2 of 300 mV to 600 mV in aqueous solution (pH 0 to 14). Electron/hole transport through Schottky tunnel junction structures of varying TiO2 thickness was studied using the reversible redox couple ferri/ferrocyanide. The dependence of the water oxidation overpotential on ALD-TiO2 thickness, with all other anode design features unchanged, exhibits a linear trend corresponding to ∼21 mV of added overpotential at 1 mA cm−2 per nanometer of TiO2 for TiO2 thicknesses greater than ∼2 nm. For thinner TiO2 layers, an approximately thickness-independent overpotential is observed. The linear behavior for anodes with thicker TiO2 layers is consistent with the predicted effect of bulk TiO2-limited electronic conduction on the voltage required to sustain the current density across the TiO2/SiO2 insulator stack. Eight different oxygen evolution catalysts of thickness 1–3 nm are studied. For the anodes investigated, 3 nm of Ir or Ru gave the best water oxidation performance, but both thinner layers and other catalysts can be quite effective, suggesting the potential for reduced materials cost. Lastly, a flat band voltage analysis of solid state thin film capacitors was done for five different gate metals on n-Si to probe junction energetics directly relevant to a photoanode. The results are consistent with a Schottky junction in which the Fermi level at the semiconductor surface is unpinned.

Titania/alumina bilayer gate insulators for InGaAs metal-oxide-semiconductor devices

We describe the electrical properties of atomic layer deposited TiO2/Al2O3 bilayer gate oxides which simultaneously achieve high gate capacitance density and low gate leakage current density. Crystallization of the initially amorphous TiO2 film contributes to a significant accumulation capacitance increase (∼33%) observed after a forming gas anneal at 400 °C. The bilayer dielectrics reduce gate leakage current density by approximately one order of magnitude at flatband compared to Al2O3 single layer of comparable capacitance equivalent thickness. The conduction band offset of TiO2 relative to InGaAs is 0.6 eV, contributing to the ability of the stacked dielectric to suppress gate leakage conduction.

Temperature-dependent capacitance-voltage analysis of defects in Al2O3 gate dielectric stacks on GaN

Capacitance-voltage measurements of Pd/atomic layer deposited Al2O3/GaN metal oxide semiconductor capacitors performed over a temperature range of 77 K-500 K are reported. Border trap response is not detected in these measurements, consistent with the energy levels of bulk Al2O3 defects predicted in reported first principles calculations. The limitations of the conductance method for estimation of the interface state density of the wide band gap GaN semiconductor, even at a measurement temperature of 500 K, are discussed. As GaN-based devices are intended for high temperature applications, the role of the pyroelectric effect in the interpretation of higher-temperature capacitance-voltage data is described.

GeSn channel nMOSFETs: Material potential and technological outlook

Semiconducting germanium tin (GeSn) alloy has recently emerged as a candidate for optoelectronic and high performance CMOS devices because of its tunable direct gap and potential for high electron and hole mobilities. High hole mobility in GeSn channel pMOSFETs has already been demonstrated [1, 2]. However, GeSn as channel for nMOSFETs has not yet been explored. In this work we perform detailed theoretical analysis to gauge the benefits of GeSn channel over Ge for nMOSFETs. Our analysis predicts GeSn nMOSFETs to outperform Ge. GeSn n-channel devices have been successfully fabricated and factors limiting its performance.

Photoluminescence from silicon dioxide photonic crystal cavities with embedded silicon nanocrystals

One dimensional nanobeam photonic crystal cavities are fabricated in silicon dioxide with silicon nanocrystals. Quality factors of over 9 x 10^3 are found in experiment, matching theoretical predictions, with mode volumes of 1.5(lambda/n)^3 . Photoluminescence from the cavity modes is observed in the visible wavelength range 600-820 nm. Studies of the lossy characteristics of the cavities are conducted at varying temperatures and pump powers. Free carrier absorption effects are found to be significant at pump powers as low as a few hundred nanowatts.

EOT Scaling of

TiO₂/Al₂O₃/Ge gate stacks have promising characteristics for future germanium-channel high-performance MOSFETs. In this letter, TiO₂/Al₂O₃ bilayer high-k dielectrics with EOT 0.65 nm are demonstrated and used in Ge pMOSFETs for the first time, giving low subthreshold swing (71 mV/dec) and large on-state current (28 A/um). In addition, detailed investigations of these devices with two different gate metals - Al/W and Al/Pt - are performed for stable metal/TiO₂ interfaces and EOT scaling.

{\rm TiO}_{2}/{\rm Al}_{2}{\rm O}_{3}

We report on strain relaxation mechanisms in highly compressive-strained (0.67%–2.33% biaxial strain), thin SiGe-on-insulator (SGOI) structures with Ge atomic fraction ranging from 0.18 to 0.81. SGOI layers (8.7–75 nm thickness) were fabricated by selective oxidization of Si from compressively strained SiGe films epitaxially grown on single crystalline Si-on-insulator (SOI) layers. During high temperature oxidation annealing, strain relaxation occurred due to both intrinsic stacking fault (SF) formation and biaxial stress-driven buckling of the SiGe layers through viscous flow of the overlying and underlying SiO2 layers. Transmission electron microscopy (TEM) and x-ray diffraction were performed to confirm the simultaneous occurrence of these two strain relaxation mechanisms. The results indicate that ∼30% of the observed strain relaxation can be attributed to formation of intrinsic SFs and the remaining strain relaxation to stress-driven buckling of the SiGe layers. In addition, cross-sectional TEM image...