Markus Schu

System on silicon-IC for motion compensated scan rate conversion, picture-in-picture processing, split screen applications and display processing

An IC for consumer electronics TV sets performing 100 Hz interlaced/60 Hz progressive scan rate conversion has been designed. Picture-in-picture, split screen and picture improvement capabilities are also integrated. It applies a motion-compensating algorithm for high-quality scan rate conversion. PIP processing is done using a full frame based scan rate conversion method. Split screen applications with two asynchronous input sources are supported. All field memories are included using a high performance embedded DRAM technology. Therefore the IC, which is compatible with current TV concepts, meets economical demands with increased functionality.

System-on-silicon solution for high quality consumer video processing-the next generation

This paper presents the next generation of a highly integrated low cost single-chip video processing system-on-chip with outstanding feature content and performance. The IC/sup 3/ unites the complete processing chain between tuner output (CVBS) and RGB processing. It comprises a perfected motion adaptive algorithm for high quality de-interlacing and up-conversion including a special cinematic source processing, picture-in-picture, split screen and manifold picture manipulation and improvement capabilities are implemented as well as color decoding and all necessary A/D and D/A conversions. All field memories are realized on-chip with YUV4:2:2 color representation up to SVGA resolution. Manufactured in a 0.18 /spl mu/m copper eDRAM technology, the IC meets economical demands with increased functionality.

Real-time video quality assessment platform

This paper presents a system for real-time video quality monitoring up to full-HD resolution in a networked environment. As sources of quality degradations, artifacts coming from block based compression are considered. The developed system captures live video, extracts video quality indicators in real-time, and renders them on the remote workstation.

Standardized video interface eases design process and reduces time-to-market

Video ICs are composed of several signal processing units that perform different tasks such as filtering, changing the sampling rate or mixing different data streams. In most cases these blocks are connected to form a processing chain, where one block receives signals from the preceding one. To develop an IC more effectively, it is desired to reuse the known cores. The design of several video ICs in the past resulted in a lot of cores being available. The problem, however, is that all blocks are defined by their own timings which rarely fit into new surroundings. Therefore the adaptation, or even the revision of one or more blocks may become necessary. The paper describes a general approach to unify the interfaces of all video processing cores, so that a core-based design is simplified. A newly developed 100 Hz upconversion IC is presented whose processing blocks are equipped with the interface described.

Dual-channel video-graphics-controller for HDTV flat-panel display TV

This paper presents a high integrated high-performance video processing system-on-chip for HDTV displays. The IC unites the complete processing chain for dual-channel display and can be directly connected to a PDP or LCD by LVDS or RGB resp. It comprises a 3D-comb filter, two color-decoders, two channel motion adaptive de-interlacer with a new algorithm to eliminate staircase effects, as well as scaling, picture-improvement and frame-rate conversion processing units. A powerful 32 bit CPU controls internal and external tasks and a high-resolution pixel-graphic is generated for on-screen menus and teletext display