Martin Gutsche

(Ba,Sr)TiO 3 dielectrics for future stacked- capacitor DRAM

Thin films of barium-strontium titanate (Ba,Sr)TiO3 (BSTO) have been investigated for use as a capacitor dielectric for future generations of dynamic random-access memory (DRAM). This paper describes progress made in the preparation of BSTO films by liquid-source metal-organic chemical vapor deposition (LS-MOCVD) and the issues related to integrating films of BSTO into a DRAM capacitor. Films of BSTO deposited on planar Pt electrodes meet the electrical requirements needed for future DRAM. The specific capacitance and charge loss are found to be strongly dependent on the details of the BSTO deposition, the choice of the lower electrode structure, the microstructure of the BSTO, the post-electrode thermal treatments, BSTO dopants, and thin-film stress. Films of BSTO deposited on patterned Pt electrodes with a feature size of 0.2 µm are found to have degraded properties compared to films on large planar structures, but functional bits have been achieved on a DRAM test site at 0.20-µm ground rules. Mechanisms influencing specific capacitance and charge loss of BSTO films are described, as are the requirements for the electrode and barrier materials used in stacked-capacitor structures, with emphasis given to the properties of the Pt/TaSi(N) electrode/barrier system. Major problems requiring additional investigation are outlined.

Plasma-etching processes for ULSI semiconductor circuits

An overview is presented of plasma-etching processes used in the fabrication of ULSI (ultralarge-scale integrated) semiconductor circuits, with emphasis on work in our facilities. Such circuits contain structures having minimum pattern widths of 0.25 µm and less. Challenges in plasma etching in evolving to such dimensions have come from the implementation of antireflective coatings and thinner, more etchsensitive photoresists; the increased aspect ratios needed to meet design requirements; the additional hard-mask etching steps needed at levels at which lithography is unsuitable for patterning; and increased selectivity requirements, such as the requirement that contact structures be self-aligning. Future circuit density and performance requirements dictate tighter specifications for linewidth variations permitted across a wafer, microloading effects, and device damage. As a result, plasma-etching systems for critical levels are migrating from traditional multifilm, capacitively coupled low-density-plasma systems to medium- and high-density-plasma systems employing exotic or highly polymerizing chemical species specifically designed for one type of film.

Patterning of 0.175 μm platinum features using Ar/O2 chemically assisted ion-beam etching

Argon/oxygen based chemically assisted ion-beam etching has been investigated for the patterning of stacked capacitor platinum electrodes at ground rules of 200 nm and below. Titanium nitride and bilayers of titanium on top of titanium nitride were used as hard mask layers in the patterning of the platinum. The ion-beam platinum etch process relies on physical sputtering by Ar ions with oxygen being added to the chamber during the etch to provide passivation of the Ti or TiN hard mask material. Pt:Ti etch selectivities of up to 20 have been achieved on blanket wafer samples. Sidewall profile angles greater than 80° (measured from the horizontal) were obtained for tightly spaced platinum features with a pitch of 350 nm using a multiple-angle ion-beam etch process. The uniformity of the etch process across 200 mm diam blanket oxide wafers was measured to be 3.5% (3σ value).