Martin J. Izzard

P4: programming protocol-independent packet processors

P4 is a high-level language for programming protocol-independent packet processors. P4 works in conjunction with SDN control protocols like OpenFlow. In its current form, OpenFlow explicitly specifies protocol headers on which it operates. This set has grown from 12 to 41 fields in a few years, increasing the complexity of the specification while still not providing the flexibility to add new headers. In this paper we propose P4 as a strawman proposal for how OpenFlow should evolve in the future. We have three goals: (1) Reconfigurability in the field: Programmers should be able to change the way switches process packets once they are deployed. (2) Protocol independence: Switches should not be tied to any specific network protocols. (3) Target independence: Programmers should be able to describe packet-processing functionality independently of the specifics of the underlying hardware. As an example, we describe how to use P4 to configure a switch to add a new hierarchical label.

Tiny Tera: a packet switch core

In this paper, we present the Tiny Tera: a small packet switch with an aggregate bandwidth of 320Gb/s. The Tiny Tera is a CMOS-based input-queued, fixed-size packet switch suitable for a wide range of applications such as a highperformance ATM switch, the core of an Internet router or as a fast multiprocessor interconnect. Using off-the-shelf technology, we plan to demonstrate that a very highbandwidth switch can be built without the need for esoteric optical switching technology. By employing novel scheduling algorithms for both unicast and multicast traffic, the switch will have a maximum throughput close to 100%. Using novel highspeed chip-to-chip serial link technology, we plan to reduce the physical size and complexity of the switch, as well as the system pin-count.

A study of the host-network interface for MPEG based desktop video conferencing

This paper describes the experimental transport of a full motion MPEG-1 system stream (combines audio, video and timing information) over an ATM network. We analysed the factors related to the host interface that affected the video and audio quality. We found that in order to achieve high resolution video conferencing at the desktop, a dedicated hardware decoder is needed. Furthermore, software handling of the MPEG-1 packets introduces jitter greater than 250 ms due to the underlying non-real time operating system. We plan to use the results to define and develop a dedicated network-interface and audio-video decoder-encoder subsystem that unloads the PC and facilitates video conferencing and video playback.

High quality packet video terminal

Asynchronous transfer mode (ATM) network protocols can provide guaranteed quality of service for jitter sensitive video traffic. However current terminals (i.e., PCs, workstations) present a bottleneck since they do not provide a real time packet service. In a previous work the authors showed that a workstation terminal can introduce upto 500 ms of jitter in the video stream due to software packet handling. This report describes the design of a prototype terminal capable of supporting high quality packet video applications in real time. We describe a decentralized network terminal architecture that modifies a PC to a video terminal capable of less than 50 /spl mu/s jitter. The video channel between the network interface and the video subsystem is sustained without any CPU involvement, thus allowing multitasking.

Small high-bandwidth ATM switch

The tiny tera is an all-CMOS 320 Gbps, input-queued ATM switch suitable for non-ATM applications such as the core of an Internet router. The tiny tera efficiently supports both unicast and multicast traffic. Instead of using optical switching technology, we achieve a high switching-bandwidth by using less expensive and proven CMOS technology. Because of limitations in memory and interconnection bandwidths, we believe that to achieve such a high-bandwidth switch requires an innovative architecture. By using virtual output queuing (VOQ) and novel scheduling algorithms, the tiny tera will achieve a maximum throughput close to 100% without the need for internal speedup.