Martin Rem

Trace Theory and Systolic Computations

Abstract : We discuss a class of concurrent computations, or special-purpose computing engines, that may be characterized by (i) they consist of regular arrangements of simple cells; (ii) the arrangement consumes streams of input values and produces streams of output values; (iii) the cells communicate with a fixed number of neighbor cells only; (iv) the communication behaviors of the cells are independent of the values communicated. Such arrangements are often referred to as systolic arrays. Our computations, however, have a few other characteristics that are usually not found among systolic arrays: (v) synchronization of cells is by message passing only; (vi) each output value is produced as soon as all input values on which it depends have been consumed. The formalism we use to discuss these computations is trace theory [4], [7], [8]. Section 1 is an introduction to trace theory, in which only those subjects are covered that are needed to understand the subsequent sections. Section 2, called Data Independence, addresses the question what it means that communication behaviors are independent of the values communicated. To express the simplicity of (the communication behaviors of) the cells we define in Section 3 the concept of conservative processes. The results of Sections 2 and 3 are assembled into a number of theorems that are used in Sections 4, 5, and 6. Each of these remaining sections discusses an illustrative example of a systolic computation: polynomial multiplication, cyclic encoding, and palindrome recognition.

VLSI Programming of Asynchronous Circuits for Low Power

In this chapter we analyze the potential of asynchronous circuits for low power consumption. We set out by reviewing the mechanisms of energy dissipation of digital CMOS ICs in general and clocked circuits in particular. For many applications the generation and distribution of the clock signal account for more than half the power dissipation, directly or indirectly. Much of this wasted clock power — and often much more — can be saved by applying asynchronous circuit techniques.

Trace Theory and the Definition of Hierarchical Components

The relevance of trace theory to the design of VLSI circuits is discussed. We present an introduction to trace theory and to regular trace structures in particular. We show, in a number of examples, how trace theory can be used to reason about and to prove properties of hierarchical components.

Concurrent computations and VLSI circuits

VLSI is a medium in which computations can be realized that exhibit a high degree of concurrency. Concurrent computations require a very careful design technique, for, as we know, uncontrolled concurrency results in uncontrollable complexity. This observation makes complexity control a conditio sine qua non for VLSI design. We know of only one effective technique of complexity control: modular design. Using this technique, the design of a component amounts to the choice of subcomponents and relations. The relations express how the parts (the subcomponents) constitute the whole. Designing the subcomponents in a similar fashion, we obtain hierarchical components. Given the specifications of the subcomponents and the way in which the subcomponents constitute the component, we must be able to show that the whole component meets its specification. The specifications should not reflect the internal structures of the components: they must specify their net effects only.

A personal perspective of Alphern-Schneider characterization of safety and liveness

In [1] Alpern and Schneider give a topological characterization of safety and liveness properties. This note is the formal reflection of my own understanding of their theory.

A serial sorting machine

This paper contains a description of a data sorting machine intended for VLSI construction. Sorting is done with simultaneous compare/sort operations so that the amount of time needed for sorting N words is proportional to N.

Designing systolic, distributed buffers with bounded response time

Several buffer designs are derived by applying a design methodology that is based on so-called abstract states. Abstract states are euivalence classes of communication histories. These abstract states are very useful in the verification of program transformations, since they facilitate the definition of a function mapping the states of the transformed automaton onto the states of the original one. Three kinds of bufferes are discussed: the stack, the first-in first-out queue, and the priority queue. The designs are systolic and offer bounded response time, which means that all permissible communications are accepted within a time bounded by a constant. The design of the stack offers maximum storage utilization as well. We show that the properties of bounded response time and maximum storage utilization cannot be combined in distributed systolic queues.

Small programming exercises 1

A beautiful solution to a programming problem can be fascinating and exciting. This is a fortiori so when the solution is the embodiment of a convincing derivation from the problem specification. Over the years a collection of such problems and solutions have been constructed at Eindhoven University of Technology. They were used to test the programming abilities of the students. At other universities similar collections must have been compiled. Thus, a growing repertoire of beautiful solutions is emerging. In this new section I want to share with the readers of Science of Computer Programming the fascination of arriving at-or being exposed to-such solutions to programming exercises. This is not a ‘traditional’ problem section with readers submitting solutions and an editor keeping score of the correct solutions. Our exercises are just too simple for that: an experienced programmer will usually find a satisfactory solution in a few minutes. That is why I call them ‘exercises’. Many solutions I present may, nevertheless, be surprising. They may be simpler than the reader envisaged, or just clearer, or they may involve an unexpected correctness argument. Of course, I may occasionally revert to disappointing or questionable solutions. In such cases I would like my readers to criticize me and to propose improvements or alternative solutions. In this way we may foster the science of programming while enjoying the programming exercises. It goes without saying that I also welcome suggestions for new exercises. Exercises in textbooks are often either elementary or very complicated. This section aims at a level in-between. Most exercises will require some thought before they can be solved. They are of the type one could assign to a student taking a modern programming course, say one based on David Gries’s text The Science of Programming (Springer, Berlin, 1981). This first time I offer three exercises. In order for the reader to become acquainted with my style of presenting exercises and solutions, I include one of the solutions. The solutions to the other two will appear in the next issue. Exercise 0 I owe to W.H.J. Feijen. Exercise 1 is a mild variation of a programming problem received from Rutger M. Dijkstra. Exercise 2 was composed by Jan L.A. van de Snepscheut. The notation in which I phrase the exercises and the solutions-i.e., the notation for functional specifications and programs-I owe to Edsger W. Dijkstra.

The nature of delay-insensitive computing

Delay-insensitive systems are systems whose correct functioning does not depend on delay assumptions. In this paper a gradual introduction to delay-insensitivity is given, illustrated by many examples. Precise definitions are given of delay-insensitivity, decomposition (or refinement), and speed-independence. Recent results of the associated theory are touched upon.

The derivation of systolic computations

A method is presented by which systolic computations can be derived from formal specifications. These derivations proceed in a calculational manner, originating from input/output relations and guided by performance considerations. The resulting program is a network of communicating cells that are expressed in a CSP-like program notation. The derivation method is illustrated by means of a nontrivial example, viz. the design of a rank order filter.