Martin Weisheit

Imaging and strain analysis of nano-scale SiGe structures by tip-enhanced Raman spectroscopy.

The spatial resolution and high sensitivity of tip-enhanced Raman spectroscopy allows the characterization of surface features on a nano-scale. This technique is used to visualize silicon-based structures, which are similar in width to the transistor channels in present leading-edge CMOS devices. The reduction of the intensive far-field background signal is crucial for detecting the weak near-field contributions and requires beside a careful alignment of laser polarization and tip axis also the consideration of the crystalline sample orientation. Despite the chemical identity of the investigated sample surface, the structures can be visualized by the shift of the Raman peak positions due to the patterning induced change of the stress distribution within lines and substrate layer. From the measured peak positions the intrinsic stress within the lines is calculated and compared with results obtained by finite element modeling. The results demonstrate the capability of the tip-enhanced Raman technique for strain analysis on a sub-50nm scale.

Impact of dual beam laser spike annealing parameters on nickel silicide formation characteristics

Nickel silicide is a common contact material for current generation microelectronic devices. As the technology nodes become smaller, forming the NiSi phase with milli-second or below annealing is an attractive alternative to conventional RTA annealing because of the potential for increased device performance and yield. This paper will discuss the use of a dual beam laser spike annealing (LSA) to form nickel silicide on silicon wafers in the microsecond regime. A detailed evaluation of anneal times (400µs and 800µs) and anneal exposure (100% and 50% stitching, or single and double anneals) was done on 300mm wafers with NiPtSix film (post-RTA1 anneal/100Å). Analytical testing by sheet resistance, CGS, XRD, AES depth profile, AFM, SEM, and ellipsometry was performed on the wafers to examine the effects of anneal times and exposure on phase transition and/or film morphology. A study of the nickel silicide transition curve by sheet resistance vs. temperature shows that there is a higher NiSi damage threshold temperature for single anneal as compared to double anneal. For uniformly annealed full wafers processed at temperatures slightly below the damage threshold, the results confirm: 1) NiSi was formed with negligible or small differences in film structure and, 2) the 100% stitching single annealed wafers show similar process performance in terms of sheet resistance and within wafer uniformity to the 50% stitching double annealed wafers at both 400 and 800µs.

Characterization of nickel silicide transition behavior using non-contact CGS metrology

Advanced millisecond annealing technologies are being implemented to enable scaling of silicidation of Ni for contacts. There are several aspects of the millisecond annealing process that must be optimized in order to minimize defects and improve yield. One critical aspect is that NiSi agglomeration must be suppressed at higher annealing temperatures. Typically, the onset of agglomeration can be detected by microscopic observation, phase analysis or electrical measurement. This paper describes an alternate approach using the Coherent Gradient Sensing (CGS) interferometer to provide a fast, non-contact method for quickly identifying the nickel silicide agglomeration threshold. Wafers with blanket Ni films were annealing using laser spike annealing (LSA) at various temperatures. The CGS technique is demonstrated to be sensitive to changes in surface morphology associated with the nickel silicide phase transitions and agglomeration and the results correlate to more conventional metrology approaches.

Physical and electrical properties of MOCVD and ALD deposited HfZrO4 gate dielectrics for 32nm CMOS high performance logic SOI technologies

Future scaling of complementary metal oxide semiconductor (CMOS) technology requires high-k (HK) dielectrics with metal gate (MG) electrodes to realize higher gate capacitances and low gate leakage currents [1]. During the last decade the semiconductor industry has spent tremendous effort to find the right material. Hafnium-based dielectrics and particularly HfO2 are considered to be the most promising candidates to replace SiON in high volume manufacturing due to their relatively high dielectric constants, large band gap and conduction band offset to Si and their thermodynamic stability with Si [2-4]. However, compared to SiO2, HfO2 dielectrics suffer from threshold voltage instabilities, mobility degradation, charge trapping as well as reliability degradation [5,6]. Recently HfZrO4 has been shown to be a superior gate dielectric to HfO2 [7-11]. Addition of ZrO2 to HfO2 forming HfZrO4 helps to partially stabilize tetragonal phase being associated with higher kand lower CET values [7]. Besides smaller and more uniform grains, more uniform film quality, tighter leakage distribution, less charge trapping, lower CV hysteresis, lower Dit, higher transconductance and drive currents, reduced SILC and longer product reliability lifetimes have been reported among other things for HfZrO4 compared with HfO2 [7-11]. Simultaneously disadvantages like smaller band gap (~0,4eV) and lower conduction band offsets resulting in increased leakage have been presented as well [7]. Up to now atomic layer deposition (ALD) [7-10] as well as physical vapor deposition (PVD) [11] have been explored to form the HfZrO4 layers. As metal-organic chemical vapor deposition (MOCVD) stands out due to excellent manufacturability and high throughputs, we investigate HfZrO4 dielectrics deposited with MOCVD as well as ALD as high-k gate dielectric for 32nm high performance logic SOI CMOS devices in this work. The physical properties of the HfZrO4 films have been analyzed in detail by atom probe tomography [12,13], Xray photoelectron spectroscopy, Rutherford backscattering spectrometry, time-of-flight secondary ion mass spectrometry, transmission electron microscopy, reflectometry, atomic force microscopy, variable angle spectroscopic ellipsometry as well as high temperature grazing incidence X-ray diffraction. In addition electrical parameters such as gate leakage current, capacitance equivalent thickness, threshold voltage, interface trap density (charge pumping) and performance as well as reliability data have been taken into account to directly compare both deposition methods. All parameters indicate a comparable behavior for MOCVD and ALD. Therefore MOCVD is demonstrated to be a promising alternative to ALD in high volume manufacturing in this work.

Determination of interfacial layers in high-k nanomaterials by ADXPS measurements

The interfacial layers of high dielectric constant (high - k) nanolaminate films are here explored. Problems concerning ALD nanolaminate layers deals mainly with lack of accurate methods to determine in depth profile of few nm thick stacks. Angle Dependent XPS (ADXPS) is proposed as method suitable in layer profiling. Studied stacks containing industrial grown ZrO2/HfO2 films( d∼3nm) were processed with various parameters resulting in both, layer by layer and homogenous depositions. For those and pure HfOx samples exsitu XPS, with angle dependent variation of probing depth, measurements were covered. By comparing obtained intensity ratios for different angles with computational developed stack model it was found that no simple layer by layer but some intermixing growth occurred including interaction with substrate and diffusion of silicon.