Masakazu Ishino

Micro carrier for LSI chip used in the Hitachi M-800 processor group

A compact chip carrier called the MCC (micro carrier for LSI chip) has been developed for high-density chip level packaging. The MCC realizes the smallest possible hermetic chip package by introducing full surface flip-chip interconnections, thin-film process technology, built-in termination resistors, and thermal expansion matched ceramic substrate. The MCCs are based on the mullite ceramic substrate and Al-polyimide thin-film circuits with built-in thin-film termination resistors. The main role of the MCC is to reliably interconnect the LSI I/Os and MLC I/Os by matching the I/O pad pitches of the LSI and those of the MLC. The authors discuss the structure of the MCC and the thin-film process technology for its fabrication. >

Effect of Gas Flow Velocity on Tarnish Kinetics of Contact Materials

Experiments were conducted to show the effects of gas flow velocity in the test chamber, the kinds of corrosive gases, and their concentration on the tarnish kinetics of copper and silver. The gas flow velocity was varied from 0.4 cm/s to 42 cm/s. H 2 S was selected as the corrosive gas in the single gas test condition, and H 2 S, NO 2 , and SO 2 were selected as the corrosive gases in complex conditions, at room temperature and a relative humidity of 70 percent.

Formation of High Quality GaAs/Si Hetero-Structure by Solid Phase Epitaxy

Improvements of crystal quality in GaAs/Si heterostructure by solid phase epitaxy (SPE) are described. RBS and TEM measurements indicate that high density defects are located near the GaAs/Si interface after “2-step MBE”. Utilization of post SPE process (amorphization plus regrowth) significantly improve crystal qujali ty at the GaAs/Si interface, although a small stress field is introduced. In addition a new relation between photoluminecence intensity ratio and stress field is established. This provides a useful too] for measuring small stresses remaining in the GaAs/Si hetero-structure.