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Dive into the research topics where Masataka Ikeda is active.

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Featured researches published by Masataka Ikeda.


SID Symposium Digest of Technical Papers | 2009

15.2: Development of Driver-Integrated Panel Using Amorphous In-Ga-Zn-Oxide TFT

Takeshi Osada; Kengo Akimoto; Takehisa Sato; Masataka Ikeda; Masashi Tsubuku; Junichiro Sakata; Jun Koyama; Tadashi Serikawa; Shunpei Yamazaki

We designed, prototyped, and evaluated LCD integrated with a gate driver and a source driver using amorphous In-Ga-Zn-Oxide TFTs having bottom-gate bottom-contact structure, thereby obtaining TFTs with superior characteristics. Then, we prototyped the worlds first 4-inch QVGA LCD and integrated the gate driver and source driver on the display panel.


Japanese Journal of Applied Physics | 2010

Development of Liquid Crystal Display Panel Integrated with Drivers Using Amorphous In–Ga–Zn-Oxide Thin Film Transistors

Takeshi Osada; Kengo Akimoto; Takehisa Sato; Masataka Ikeda; Masashi Tsubuku; Junichiro Sakata; Jun Koyama; Tadashi Serikawa; Shunpei Yamazaki

We designed, prototyped, and evaluated a liquid crystal panel integrated with a gate driver and a source driver using amorphous In–Ga–Zn-oxide thin film transistors (TFTs). Using bottom-gate bottom-contact (BGBC) thin film transistors, superior characteristics could be obtained. We obtained TFT characteristics with little variation even when the thickness of the gate insulator (GI) film was reduced owing to etching of source/drain (S/D) wiring, which is a typical process for the BGBC TFT. Moreover, a favorable ON-state current was obtained even when an In–Ga–Zn-oxide layer was formed over the S/D electrode. Since the upper portion of the In–Ga–Zn-oxide layer is not etched, the BGBC structure is predicted to be effective in thinning the In–Ga–Zn-oxide layer in the future. Upon evaluation, we found that the prototyped liquid crystal panel integrated with the gate and source drivers using the TFTs with improved characteristics had stable drive.


international solid-state circuits conference | 2014

30.9 Normally-off computing with crystalline InGaZnO-based FPGA

Takeshi Aoki; Yuki Okamoto; Takashi Nakagawa; Masataka Ikeda; Munehiro Kozuma; Takeshi Osada; Yoshiyuki Kurokawa; Takayuki Ikeda; Naoto Yamade; Yutaka Okazaki; Hidekazu Miyairi; Masahiro Fujita; Jun Koyama; Shunpei Yamazaki

An FPGA employing c-axis aligned crystal In-Ga-Zn oxide (CAAC-IGZO) FET [1] based configuration memories (CMs) is known to need no reconfiguration thanks to nonvolatile CMs, shows high operation speed due to boosting effect of pass gates used in routing switches (RS) [2], and easily realizes fine-grained multi-context (FG-MC) architecture [2] because CMs which need very low power to keep the contents can be constructed with a small number of transistors. It would be very difficult to realize all of these features in FPGAs using MRAM [3] or RRAM [4]. These features are very unique to the CAAC-IGZO FPGA.


SID Symposium Digest of Technical Papers | 2011

50.2: High Reliable In-Ga-Zn-Oxide FET Based Electronic Global Shutter Sensors for In-Cell Optical Touch Screens and Image Sensors

Hikaru Tamura; Toshiki Hamada; Takashi Nakagawa; Takeshi Aoki; Masataka Ikeda; Munehiro Kozuma; Yoshiyuki Kurokawa; Takayuki Ikeda; Koji Moriya; Yoshiharu Hirakata; Nozomi Kamata; Tsutomu Murakawa; Jun Koyama; Shunpei Yamazaki; Katsuaki Tochibayashi; Kenichi Okazaki; Masayuki Sakakura

A 6 inch XGA LCD touch screen with optical sensors in its pixels, using oxide semiconductor (OS) FETs has been developed. The extremely low off-state current of the OS FET facilitates the use of a global shutter and leads to an improved accuracy of touch detection. The possibility of a novel application of a touch screen and an image sensor that is an application of the combination of OS FETs and global shutter is proposed.


Japanese Journal of Applied Physics | 2014

Crystalline In?Ga?Zn?O FET-based configuration memory for multi-context field-programmable gate array realizing fine-grained power gating

Munehiro Kozuma; Yuki Okamoto; Takashi Nakagawa; Takeshi Aoki; Masataka Ikeda; Takeshi Osada; Yoshiyuki Kurokawa; Takayuki Ikeda; Naoto Yamade; Yutaka Okazaki; Hidekazu Miyairi; Masahiro Fujita; Jun Koyama; Shunpei Yamazaki

A multi-context (MC) field-programmable gate array (FPGA) enabling fine-grained power gating (PG) is fabricated by a hybrid process involving a 1.0 ?m c-axis aligned crystalline In?Ga?Zn?O (CAAC-IGZO) field-effect transistor (FET), which is one of CAAC oxide-semiconductor (OS) FETs, and a 0.5 ?m complementary metal oxide semiconductor (CMOS) FET. The FPGA achieves a 20% layout area reduction in a routing switch and an 82.8% reduction in power required to retain data of configuration memory (CM) cells at 2.5 V driving compared to a static random access memory (SRAM)-based FPGA. A controller for fine-grained PG can be implemented at an area overhead of 7.5% per programmable logic element (PLE) compared to a PLE without PG. For each PLE, the power overhead with fine-grained PG amounts to 2.25 and 2.26 nJ for power-on and power-off, respectively, and break-even time (BET) is 19.4 ?s at 2.5 V and 10 MHz driving.


IEEE Transactions on Very Large Scale Integration Systems | 2015

A Boosting Pass Gate With Improved Switching Characteristics and No Overdriving for Programmable Routing Switch Based on Crystalline In-Ga-Zn-O Technology

Yuki Okamoto; Takashi Nakagawa; Takeshi Aoki; Masataka Ikeda; Munehiro Kozuma; Takeshi Osada; Yoshiyuki Kurokawa; Takayuki Ikeda; Naoto Yamade; Yutaka Okazaki; Hidekazu Miyairi; Masahiro Fujita; Jun Koyama; Shunpei Yamazaki

A boosting pass gate (BPG) suitable for a programmable routing switch including a c-axis aligned crystal In-Ga-Zn-O (CAAC-IGZO) field effect transistor (FET) is proposed. The CAAC-IGZO is one of crystalline oxide semiconductors (OS). The proposed BPG (OS-based BPG, OS BPG) has a combination of a pass gate (PG) and a configuration memory (CM) cell utilizing a CAAC-IGZO FET with extremely low OFF-state current and a storage capacitor. This OS BPG achieves a routing switch with fewer transistors than a conventional routing switch having a combination of a PG and an static RAM (SRAM) cell. Owing to the boosting effect, the switching characteristics, at not only positive transition but also negative transition of input signals, of the OS BPG are improved without using overdriving. In circuits fabricated with a hybrid process of a CMOSFET and a CAAC-IGZO FET with gate lengths of 0.5 and 1.0 μm, the net delays of the OS BPG, 75 and 58 ns, at driving voltages of 2.0 and 2.5 V have been found to be less than those of the conventional routing switch (SRAM-based PG, SRAM PG) by about 79% and 62%, respectively. It has also been confirmed that a field-programmable gate array (FPGA) chip utilizing the OS BPG as a routing switch reduces the layout areas of routing switches and the whole chip by 61% and 22%, respectively, and increases the maximum operating frequencies at driving voltage of 2.0 and 2.5 V by about 2.8 times and 1.6 times of those of the FPGA chip utilizing the SRAM PG as a routing switch.


asia symposium on quality electronic design | 2013

Applications of crystalline Indium-Gallium-Zinc-Oxide technology to LSI: Memory, processor, image sensor, and field programmable gate array

Yoshiyuki Kurokawa; Yuki Okamoto; Takashi Nakagawa; Takeshi Aoki; Masataka Ikeda; Munehiro Kozuma; Takeshi Osada; Takayuki Ikeda; Naoto Yamade; Yutaka Okazaki; Hidekazu Miyairi; Masahiro Fujita; Jun Koyama; Shunpei Yamazaki

Crystalline In-Ga-Zn Oxide (IGZO) including c-axis aligned crystal (CAAC) enables FETs to show high reliability and extremely low off-state current. CAAC-IGZO technology is expected to grow to main technology of next-generation displays and is already contributing to mass-production of liquid crystal displays. In this paper by focusing on a very important feature of CAAC-IGZO FET, extremely low off-state current, its pioneering various applications to LSI are reviewed and discussed. In particular, a success in development of a hybrid process of CMOS FETs and CAAC-IGZO FETs promotes our developments of novel memories, processors, image sensors, and recently, field programmable gate arrays (FPGA).


Journal of The Society for Information Display | 2010

Driver-circuits-integrated LCDs based on novel amorphous In-Ga-Zn-oxide TFT

Takeshi Osada; Kengo Akimoto; Takehisa Sato; Masataka Ikeda; Masashi Tsubuku; Junichiro Sakata; Jun Koyama; Tadashi Serikawa; Shunpei Yamazaki

— A liquid-crystal panel integrated with a gate driver and a source driver by using amorphous In—Ga—Zn-oxide TFTs was designed, prototyped, and evaluated. By using the process of bottom-gate bottom-contact (BGBC) TFTs, amorphous In—Ga—Zn-oxide TFTs with superior characteristics were provided. Further, for the first time in the world, a 4-in. QVGA liquid-crystal panel integrated with a gate driver and a source driver was developed by using BGBC TFTs formed from an oxide semiconductor. By evaluating the liquid-crystal panel, its functionality was successfully demonstrate. Based on the findings, it is believed that the novel BGBC amorphous In—Ga—Zn-oxide TFT will be a promising candidate for future large-screen backplanes having high definition.


ECS Transactions | 2013

Novel Application of Crystalline Indium-Gallium-Zinc-Oxide Technology to LSI: Dynamically Reconfigurable Programmable Logic Device Based on Multi-Context Architecture

Yuki Okamoto; Takashi Nakagawa; Takeshi Aoki; Masataka Ikeda; Munehiro Kozuma; Takeshi Osada; Yoshiyuki Kurokawa; Takayuki Ikeda; Naoto Yamade; Yutaka Okazaki; Hidekazu Miyairi; Jun Koyama; Shunpei Yamazaki


symposium on vlsi technology | 2011

Electronic global shutter CMOS image sensor using oxide semiconductor FET with extremely low off-state current

Takeshi Aoki; Masataka Ikeda; Munehiro Kozuma; Hikaru Tamura; Yoshiyuki Kurokawa; Takayuki Ikeda; Yuta Endo; Tetsunori Maruyama; Noriko Matsumoto; Yoshinori Ieda; Atsuo Isobe; Jun Koyama; Shunpei Yamazaki

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Takeshi Aoki

Tokyo Polytechnic University

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Masashi Tsubuku

Schweitzer Engineering Laboratories

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