Masayasu Tanjyo

Negative-ion implantation technique

Abstract Negative-ion implantation is a promising technique for charging-free implantation for the forthcoming ULSI fabrication, in which the water charging by positive-ion implantation will become a troublesome problem even with an electron shower. The negative-ion implantation technique remarkably ameliorates such a charging problem since the incoming negative charge of implanted negative ions is easily balanced by the outgoing negative charge of a part of secondary electrons. Thus, the surface charging voltage is maintained to within about ± 10 V for isolated conducting materials and insulators, and is free from space and time fluctuations. A high-current negative-ion source and a medium current negative-ion implanter developed for this technique are described with the design concepts. In addition, the fundamental measurements of interactions between the negative-ion beam and the gas/solid are also described.

The charging mechanism of insulated electrode in negative-ion implantation

Abstract The wafer charging during ion implantation is a serious problem with greater levels of circuit integration in semiconductor device fibracations. Positive charges are accumulated on insulated electrodes or insulators and cause dielectric breakdown if there is no compensation of charging. Ion implantation with negative ions is one of the hopeful techniques to solve this problem. Since an incident ion is a negative charge, an incoming negative charge and an outgoing negative charge of secondary electrons will achieve electrical equilibrium on the insulated electrode. Therefore the charging voltage is extremely low because of this electrical equilibrium. We have measured the charging voltage at several energies of negative ions and also simulated the charging voltage with varying secondary-electron emission factor. We have found that the charging voltage depends on the secondary-electron emission factor.

Ultralow-Thermal-Budget CMOS Process Using Flash-Lamp Annealing for 45 nm Metal/High-

This paper describes a fabrication process that uses flash-lamp annealing (FLA) and the characteristics of the CMOS transistors that are constructed with an ultralow-thermal- budget process tuned for 45-nm metal/high-k FETs. FLA enhances the drivability of pFETs with the solid-phase epitaxial (SPE) extension junction, but reducing the thermal budget deteriorates the poly-gate depletion and the electron mobility. Metal gate, however, prevents the depletion problem and leads to higher drain currents and better threshold-voltage (VTH) roll-offs when processed with tilted extension implantation combined with SPE + FLA than when processed with untilted extension implantation combined with spike rapid thermal annealing. Reducing the thermal budget is also effective in obtaining low VTH values in p-metal/HfSiON gate because of the reduced vacancy formation. Moreover, cluster-boron implantation for pFETs has superiority over monomer-boron implantation with Ge postamorphous implantation in terms of VTH roll-offs and Ion-Ioffs if FLA is used as activation. The superior electrical characteristics of full-metal- gate HfSiON transistors whose gate length is less than 50 nm, which are fabricated by using the FLA process, are demonstrated.

k

Recently, boron cluster implantation (i.e. decaborane: B10Hx+) is regarded as a promising technology for the formation of P‐type Ultra Shallow Junction (USJ) because of the equivalent high beam current with less beam divergence compared to the conventional B+ or BF2+ implantation. Also as‐implanted and after‐annealing characteristics are different due to the appearance of self‐amorphized layer by the cluster ion bombardment, which suppresses the channeling and enhances the boron activation. However, it is anticipated that the properties caused by this amorphous layer will vary with different implantation conditions or a presence of Pre Amorphization Implantation (PAI) process, which should be understood well to maintain a good process control. From this point of view, we have measured the decaborane implantation characteristics by a couple of different related conditions, for instance, the beam energy and current. Sheet resistance vs junction depth (Rs‐Xj) are also evaluated in different annealing methods...

FETs

In order to fabricate ULSI devices on large wafers up to 300 mm in diameter, an ion implantation system that can transport a high-current ion beam with low energy and suppress the charge-up on the wafer is necessary. Both problems come from the space charge effect; to solve them it is convenient to use a large-area ribbon-beam ion source, because it leads a low current density and low charge-up on the wafer. However, handling of the large-area beam is not easy and beam profile control on the wafer is even more difficult. This article is concerned with a method for controlling the beam profile of the large-area ribbon-beam ion source in RF plasma production. As the size of the ion-source chamber is comparable to the RF wavelength, then the ion-beam profile can be controlled by adjusting the size of the variable windows into the chamber for the RF wave. Accordingly, less than 2% spread in uniformity of the large-area ion beam is achieved.

Implantation characteristics by boron cluster ion implantation

Abstract A mass-selected ion source has been developed for low energy ion implantation. The use of high current and low energy ion beam causes the target charge-up and space charge problem in the beam transport line. We have used the large area ion source without mass separation. The ionization energy of hydrogen is higher than that of diborane. If we can control the energy of electrons in the plasma, we can design a hydrogen-free ion source. In order to make clear the relationships between the energy of electrons and r.f. discharge parameters, we measured the r.f. discharge parameters with a Langmuir probe while changing the radio frequency, r.f. power and so on. The proportion of the hydrogen ions to total ions generated in the plasma could then be less than 1%.

RF ion source for low energy ion implantation — beam profile control of a large-area ion source using 500-MHz discharge

Diffusion-less activation were realized for the 650degC SPE, >1300degC flash and 900degC spike anneals. For pSDE all boron dopant species (BF₂, B₁₀H₁₄ and B₁₈H₂₂) achieved high quality junctions with flash annealing. With 900degC spike either B₁₀H₁₄ or B₁₈H₂₂ can be used while with 650degC SPE annealing only B₁₈H₂₂ can be used. For pHALO using In no difference in activation level could be seen but significant differences in junction leakage was observed. No difference between BF₂ and B₁₀H₁₄ HALO activation could be seen for each annealing condition and SPE annealing resulted in the worse activation level. For nSDE with flash annealing As, As₂ and Sb activation levels were similar while P₂ was 25% better. With SPE and 900degC spike Sb gave the best activation. For nHALO As, As₂ and Sb activation levels were similar for all annealing conditions with SPE resulting in 2x lower activation. Doubling the As₂ dose improved SPE activation by 2x.

Development of an ion source for the low energy ion implantation

A new medium current ion implanter has been developed based on the EXCEED3000, which is highly reliable and widely used in 300mm fabs. The ion implanter now has to be designed so that it can precisely measure and control beam characteristics. For example beam angles have to be controlled in halo implantation because high tilt angle implantation is done according to the device geometric structure. Not only horizontal beam profile system but also vertical beam profile system are implemented in EXCEED3000AH‐G3 for the precise implantation control.

Molecular Dopants and High Mass Dopants for HALO and Extension Implantation

A review of the newly developed ion sources for implantation application is presented. These ion sources include Bernas ion source and electron cyclotron resonance (ECR) ion source. They have advantages of source lifetimes and yields of multiply charged ion‐beam current. Typical lifetime of Bernas source is 100 h and the ratio of As2+/As+ is about 25% with wide range beam current controllability. Lifetime of the ECR source is more than 150 h and the ratio of As2+/As+ beams is about 50%. The characteristics of these ion sources for the ion implantation system are also presented on actual uses in factories.

High performance medium current ion implanter system EXCEED3000AH‐G3

Phosphorus transient enhanced diffusion (TED) is caused by interstitial diffusion mechanism. It is important for the efficient suppression of phosphorus diffusion that some carbons could be located on lattice point in the initial stage of re-growth during annealing and trap interstitial Silicon. Carbon co-implantation after Germanium, pre-amorphization implantation (PAI) is applied for the applications of n+/p junction formation and the effects of Carbon co-implantation are reported. In our experiments it is shown that suppression of Phosphorus diffusion could be achieved with conventional rapid thermal annealing (RTA) by using cluster Carbon (C16Hx+, C7Hx+) co-implantation for the self-amrphization. Our experimental data suggests that cluster carbon co-implantation enable to suppress phosphorus diffusion without germanium pre-amorphous implantation. In this paper the characteristics of cluster Carbon co-implantation after RTA are introduced from experimental results which were obtained by secondary ion mass spectroscopy (SIMS) measurement, transmission electron microscopy (TEM) and sheet-resistance measurement.