Massimiliano Chiodo

Hardware-software codesign of embedded systems

Designers generally implement embedded controllers for reactive real-time applications as mixed software-hardware systems. In our formal methodology for specifying, modeling, automatically synthesizing, and verifying such systems, design takes place within a unified framework that prejudices neither hardware nor software implementation. After interactive partitioning, this approach automatically synthesizes the entire design, including hardware-software interfaces. Maintaining a finite-state machine model throughout, it preserves the formal properties of the design. It also allows verification of both specification and implementation, as well as the use of specification refinement through formal verification.<<ETX>>

Synthesis of software programs for embedded control applications

Software components for embedded reactive real-time applications must satisfy tight code size and run-time constraints. Cooperating finite state machines provide convenient intermediate format for embedded system co-synthesis, between high-level specification languages and software or hardware implementations. We propose a software generation methodology that takes advantage of a restricted class of specifications and allows for tight control over the implementation cost. The methodology exploits several techniques from the domain of Boolean function optimization. We also describe how the simplified control/data-flow graph used as an intermediate representation can be used to accurately estimate the size and timing cost of the final executable code.

Synthesis of Software Programs for Embedded Control Applications

Software components for embedded reactive real-time applications must satisfy tight code size and run-time constraints. Cooperating Finite State Machines provide a convenient intermediate format for embedded system co-synthesis, between high-level specification languages and software or hardware implementations. We propose a software generation methodology that takes advantage of the very restricted class of specifications and allows for tight control over the implementation cost. The methodology exploits several techniques from the domain of Boolean function optimization. We also describe how the simplified control/data-flow graph used as an intermediate representation can be used to accurately estimate the size and timing cost of the final executable code.

A case study in computer-aided co-design of embedded controllers

We present an application of the methodology and of the various software tools embedded in the POLIS co-design system. The application is in the realm of automotive electronics: a shock absorber controller, whose specification comes from an actual product. All aspects of the design process are closely examined, including high level language specification and automatic hardware and software synthesis. We analyze different software implementation styles, compare the results, and outline the future developments of our work.

Fast hardware/software co-simulation for virtual prototyping and trade-off analysis

Hardware/software co-simulation is generally performed withseparate simulation models.This makes trade-off evaluationdifficult, because the models must be re-compiled wheneversome architectural choice is changed.We propose a techniqueto simulate hardware and software that is almost cycle-accurate,and uses the same model for both types of components.Only the timing information used for synchronizationneeds to be changed to modify the processor choice, the implementationchoice, or the scheduling policy.We show howthis technique can be used to decide the implementation of areal-life example, a car dashboard controller.

Software synthesis for complex reactive embedded systems

We propose a software synthesis procedure for reactive embedded system. The procedure is an extension of the approach in the POLIS co-design framework. In our approach, control parts of the system are represented in a decomposed form, enabling more complex control structures to be represented. We propose a synthesis procedure for this representation that avoids unnecessary evaluations of the data part, as well as the overhead of run-time scheduling.

Trade-off evaluation in embedded system design via co-simulation

Current design methodologies for embedded systems often force the designer to evaluate early in the design process architectural choices that will heavily impact the cost and performance of the final product. Examples of these choices are hardware/software partitioning, choice of the micro-controller, and choice of a run-time scheduling method. This paper describes how to help the designer in this task, by providing a flexible co-simulation environment in which these alternatives can be interactively evaluated.

Automatic compositional minimization in CTL model checking

A method for reducing the complexity of CTL model checking on a system of interacting finite state machines is described. The method consists essentially of reducing each component machine with respect to the property to be verified, and then verifying the property on the composition of the reduced components. The procedure is fully automatic and produces an exact result. The potential of the approach is assessed on real-world examples, and the method is demonstrated on a circuit.<<ETX>>

Models and Representations

This chapter describes the models and specification methods that are used inside the POLIS system, both to specify the complete system, and to perform analysis, synthesis, and optimization. It also contains a brief review of related models reported in the literature.

Rapid-prototyping of embedded systems via reprogrammable devices

This paper describes a flexible board-level rapid-prototyping environment for embedded control applications. The environment is based on an APTIX board populated by Xilinx FPGA devices, a 68hcll emulator, and APTIX programmable interconnect devices. Given a design consisting of logic and of software running on a micro-controller that implement a set of tasks, the prototype is obtained by programming the FPGA devices, the micro-controller emulator and the APTIX devices. This environment being based on programmable devices offers the flexibility to perform engineering changes, the performance needed to validate complex systems and the hardware set up for field tests. The key point in our approach is the use of results of our previous research on software and hardware synthesis as well as on some commercial tools to provide the designer with fast programming data from a high level description of the algorithms to be implemented. We demonstrate the effectiveness of the approach by showing a close-to real-life example from the automotive world.