Matthew L. Mitchell

Large-scale photonic integrated circuits

We present an overview of Infineras current generation of 100 Gb/s transmitter and receiver PICs as well as results from the next-generation 500 Gb/s PM-QPSK PICs.

Current Status of Large-Scale InP Photonic Integrated Circuits

In this paper, the current state of the art for large-scale InP photonic integrated circuits (PICs) is reviewed with a focus on the devices and technologies that are driving the commercial scaling of highly integrated devices. Specifically, the performance, reliability, and manufacturability of commercial 100-Gb/s dense wavelength-division-multiplexed transmitter and receiver PICs are reviewed as well as next- and future-generation devices (500 Gb/s and beyond). The large-scale PIC enables significant reductions in cost, packaging complexity, size, fiber coupling, and power consumption which have enabled benefits at the component and system level.

The Realization of Large-Scale Photonic Integrated Circuits and the Associated Impact on Fiber-Optic Communication Systems

Large-scale photonic integrated circuits (LS PICs) have been extensively deployed throughout the fiber optic communication network. This paper discusses the properties of the LS PICs, the interaction between them, and what is necessary to create an optical transport system that fully utilizes the properties of the LS PIC

Large-scale photonic integrated circuits for long-haul transmission and switching

Feature Issue on Nanoscale Integrated Photonics for Optical Networks Dense wavelength division multiplexed (DWDM) large-scale, single-chip transmitter and receiver photonic integrated circuits (PICs), each capable of operating at 100 Gbits/s, have been deployed in the field since the end of 2004. These highly integrated InP chips have significantly changed the economics of long-haul optical transport networks. First, a review of the ten-channel, 100 Gbits/s PIC is presented. Then two extensions of the technology are demonstrated; first is wide temperature, coolerless operation of the 100 Gbits/s PIC, and second is a single integrated chip with 40 channels operating at 40 Gbits/s, capable of an aggregate data rate of 1.6 Tbits/s.

Terabit/s class InP photonic integrated circuits

In this paper, we review recent developments in the area of terabit/s?class monolithically integrated, transmitter and receiver photonic integrated circuits for the implementation of coherent, polarization-multiplexed, quadrature phase shift keying and higher order modulation formats.

250Gb/s real-time PIC-based super-channel transmission over a gridless 6000km terrestrial link

A 250Gb/s super-channel using Photonic Integrated Circuits (PIC) was transmitted over 6000km along with a 500Gb/s super-channel and conventional 40Gb/s and 100Gb/s channels. The linear terrestrial line system uses FlexWSS multiplexing technologies and Hybrid RamanEDFA amplifiers.

Large-scale DWDM photonic integrated circuits: a manufacturable and scalable integration platform

Commercial scaling of electronic integrated circuits has proceeded at a fast pace once the initial hurdle to integration was overcome. Recently, it has been shown that record active and passive optical device counts, exceeding 50 discrete components, can be incorporated onto a single monolithic 100 Gbps DWDM transmitter PIC InP chip. We will investigate key production metrics for this large-scale PIC commercial device as well as other analogs to other III-V semiconductor commercial devices. Using the yield management tools pioneered by silicon based electronics, we will present data supporting their scalability and the manufacturability of these large-scale PICs

500 Gb/s and beyond photonic integrated circuit module transmitters and receivers

500-Gb/s transmitter and receiver photonic integrated circuit (PIC) modules are reviewed as well as their scaling to Tb/s and higher data capacities.

Extended C-Band Tunable Multi-Channel InP-Based Coherent Transmitter PICs

We demonstrate a fully integrated multi-channel InP-based coherent transmitter photonic integrated circuits (PICs) with extended C-band tunability, operating at 33 and 44 Gbaud per channel under 16-QAM dual-polarization modulation. PICs are demonstrated integrating up to 14-channels enabling multi-Tb/s total PIC capacities.

Implications of Super-Channels on Colorless, Directionless and Contentionless (CDC) ROADM Architectures

This paper proposes CDC ROADM architecture compatible with emerging DWDM super-channel technology. A real world network model is used to quantify that this architecture requires fewer network components leading to less capital and operational costs.