Matthew T. Hunter

Wideband Digital Downconverters for Synthetic Instrumentation

In this paper, we introduce a new wideband digital downconverter (WDDC) for synthetic instruments (SIs). DDCs first tune to a signals center frequency using a numerically controlled oscillator and mixer and then zoom-in to the bandwidth of interest using sample rate conversion (SRC). The SRC is required to produce continuously variable output sample rates from a fixed input sample rate over a large range. Current implementations accomplish this using a prefilter, an arbitrary factor resampler, and integer decimation filters. In this paper, we simplify the SRC of the WDDC, yielding a reduction in computational cost by a factor of 3 or more.

Modeling of jitter and its effects on time interleaved ADC conversion

Post analog-to-digital conversion correction is an active area of research in both academia and industry due to the high potential of positive impact in areas like Synthetic Instrumentation (SI), Software Defined Radio (SDR), RADAR, etc. This paper introduces a high fidelity Simulink™ based behavioral error model for time-interleaved analog-to-digital converters (TI-ADCs) to facilitate development of efficient post conversion correction algorithms for TI-ADCs. Theoretically TI-ADCs offer a technologically feasible and cost effective solution to the digitization of wide bandwidth analog signals. The contribution of the error model described in this paper solves a key obstacle in economical research and development in this area. In addition to the error sources associated with integrated high performance analog to digital converters ADCs, mismatched error sources affect the performance of time interleaved configurations.

Simulink modeling of analog to digital converters for post conversion correction development and evaluation

Theoretically time interleaved analog-to-digital converters (TI-ADCs) offer a technologically feasible and cost effective solution to the digitization of wide bandwidth analog signals. In addition to the error sources associated with integrated high performance analog to digital converters (ADCs) and the exaggerated impact of certain error sources, mismatched error sources exist. The topic of post conversion correction is an active area of research in both academia and industry due to the high potential of positive impact in areas like test instrumentation, software defined radio, radar, etc. A key stumbling block to cost effective research and development is the availability of high fidelity, high level simulations of realistic error performance of data converters. This paper describes a high fidelity, high level Simulink™ based M TI-ADC model capable of facilitating cost effective development of efficient post conversion correction algorithms. Four TI-ADCs are interleaved as an example and errors effects are discussed. A survey of published adaptive correction methods to be evaluated against this model is presented.

Optimal block adaptive I/Q mismatch compensation based on circularity

Wireless systems frequently employ I/Q modulation techniques to achieve spectral efficiency for high data rate applications. However, the main drawback of I/Q downconversion is the amplitude and phase imbalances between the analog components in the I and Q branches of the receiver. The resulting I/Q mismatch is unavoidable for practical quadrature receivers and can be frequency-dependent in nature. In this paper, a novel Optimal Block Adaptive algorithm based on the circularity property is presented for frequency-dependent I/Q imbalance compensation. The proposed technique, called OBA-C, is based on the assumption that the received baseband signal deviates from circularity in the presence of I/Q mismatch. OBA-C uses the complex Taylor series expansion to optimally update the adaptive filter coefficients at each iteration, until the circularity of the received signal is restored. Simulation results confirm the remarkable improvement in I/Q mismatch compensation and convergence speed of the proposed technique as compared to another recently proposed circularity based method.

Design of a software defined, FPGA-based reconfigurable RF Measuring Receiver

Digital Signal Processing (DSP) plays a central role in the implementation of software-defined, Synthetic Instruments (SI) [1]–[5]. Moving as many signal processing tasks as possible from the analog to the digital domain makes for a more flexible, future-proof system. Advances in DSP can also be exploited to reduce the complexity of, or remove completely, the analog components. In this work, the design of a high performance FPGA-Based Radio Frequency (RF) Measuring Receiver is described. It is shown how advanced DSP can be used to synthesize multiple measurements from a single source on a compact, software defined platform.

Direct IF Synthesis of Vector Modulated Signals using Real-Time Signal Processing

In this contribution, advanced signal processing techniques are employed to develop a flexible, high performance arbitrary waveform generator while keeping hardware complexity to a minimum. The waveform memory saving benefit of real-time signal processing is exploited, with the added stipulation of a fixed frequency sample clock. In this manner, flexibility is achieved without the need to resort to a lower performance variable sample clock and variable analog filtering of the digital-to-analog converter (DAC) output. The proposed approach is realized with a computational burden similar to current field programmable gate array (FPGA) based solutions, yielding improved performance without moving to more complex, inflexible application specific integrated circuit (ASIC) solutions. Thus, the flexibility provided by an FPGA is maintained while the overall system is simplified.

Fundamentals of modern spectral analysis

In this paper, we cover several of the fundamental or kev design parameters affecting the performance of a spectrum analvzer. We present a high level overview of the spectrum analyzer dynamic range and show how it can be achieved with both FFTSA and SSA. We discuss the effect of instan taneous bandwidth on system flexibility and measurement speed, we explore the importance of image rejection and anti-aliasing and how the lack thereof can lead to false mea surements, and we conclude with final comments and analysis.

Arbitrary Waveform Generators for synthetic instrumentation

In this work, a real field programmable gate array (FPGA) implementation of a novel arbitrary waveform generator (AWG) is presented. The new approach uses a fixed digital-to-analog converter (DAC) sample clock in combination with an arbitrary factor interpolator. Waveforms created at any sample rate are interpolated to the fixed DAC sample rate in real-time. As a result, the additional lower performance analog hardware required in current approaches, namely, multiple reconstruction filters and/or additional sample clocks, is avoided. Because the system is simple enough to be implemented on an FPGA, flexibility is maximized. Measured results are given confirming the performance of the system predicted by the theoretical design and simulation.

A novel Farrow Structure with reduced complexity

The Farrow Structure (FS) has become a standard for implementing polynomial-based interpolation filters. Several improvements have been made to enhance the performance and efficiency of the original structure. New structures have evolved from these developments. These new structures include the Modified Farrow Structure (MFS) and the Generalized Farrow Structure (GFS). The MFS takes advantage of linear phase, requiring approximately half the number of multiplications of the FS. The GFS employs oversampling to simplify the polynomial-based filter. In this contribution a novel Farrow Structure is derived. The new structure is termed the Generalized Modified Farrow Structure (GMFS). Also introduced is a special case of the GMFS, namely, the Dual Phase Modified Farrow Structure (DPMFS). It is shown that the DPMFS combines the advantages of both the GFS and MFS providing greater performance at reduced implementation cost.

Conjugate gradient based Complex Block LMS employing time-varying optimally derived stepsizes

The Complex Block Least Mean Square (LMS) algorithm has been widely used in various adaptive filtering applications. However, the main drawback of the Complex Block LMS is its slow convergence. In this paper, a novel algorithm called Complex Block Conjugate LMS (CBC-LMS) is presented, which incorporates the conjugate gradient principle into the Complex Block LMS algorithm. The proposed CBC-LMS employs orthogonal search directions in contrast to the steepest descent approach used in the Complex Block LMS algorithm. In addition, along each conjugate direction an optimal update is generated for the complex adaptive filter coefficients using the Taylor series approximation. Simulation results confirm that in channel estimation applications, the CBC-LMS exhibits faster convergence speed than the Complex Block LMS and the recently proposed Complex Optimal Block Adaptive LMS (Complex OBA-LMS), while maintaining excellent accuracy.