Md. Nur Kutubul Alam

Anomalous Staircase CV Characteristics of InGaSb-on-Insulator FET

Quasi-static capacitance voltage (CV) characteristics of In1-xGaxSb-on-insulator field-effect transistor (FET) are investigated using 1-D coupled Schrödinger-Poisson equations. Here, we report for the first time the staircase trend in the CV characteristics of such ultrathin-body FET. This observation is well correlated with the gate-bias-dependent electron concentration in different subbands. It is revealed that the staircase trend tends to disappear as the channel thickness increases above 15 nm. While the channel thickness and doping concentration-dependent shifts in CV curves are found to be significant, the composition-dependent shift is almost negligible.

On the Ballistic Performance of InGaSb XOI FET: Impact of Channel Thickness and Interface States

Here, we report the effect of channel thickness on the performance of a InGaSb-on-insulator FET with 15-nm gate length. The ballistic current-voltage characteristic is computed by nonequilibrium Greens function method using thickness-dependent effective mass, which is extracted from tight binding dispersion. Simulation result reveals that the threshold voltage and subthreshold slope decrease with decreasing channel thickness. Nearly three times enhancement in the ON-state current is observed for 3 nm compared with a 5-nm channel when the OFF-state current is made equal in each case by tuning the gate metal work function (WF). The drain-induced barrier lowering is found to decrease with decreasing channel thickness. However, interface states and roughness greatly affect the performance of such ultrathin-body device. Nevertheless, impact of interface states can be compensated by engineering the gate metal WF.

In x Ga 1– x Sb n-channel MOSFET: effect of interface states on CV characteristics

The capacitance-voltage (CV) characteristics of InGaSb based n-MOSFET are investigated by quantum mechanical calculation solving 1D self-consistent Schrodinger-Poisson equation using Silvacos ATLAS device simulation package. The charge density profile is determined with and without wave function penetration within the oxide layer and Neuman boundary condition. Quasi-static CV characteristics are studied both for the positive and negative interface charge densities. The results obtained from the simulation demonstrate that the significant shift in threshold voltage entirely depends on the polarity of the interface charge density. The oxide-dependent gate capacitance is also explained by simulating first eigen energy with and without wave function penetration.

Self-consistent quasi static CV characterization of In x Ga 1−x Sb buried channel n-MOSFET

The quasi-static capacitance-voltage (CV) characteristics of buried channel n-InGaSb MOSFET is investigated using SILVACOs ATLAS device simulation package. Self-consistent method is applied to solve the coupled one dimensional Schrödinger-Poisson equation taking into account of wave function penetration and strain effect. It is found that the CV profiles and threshold voltage are strongly depended on some important process parameters like oxide thickness, channel thickness, channel composition and temperature for buried channel InGaSb n-MOSFET.

An Analytical Model for the Gate C–V Characteristics of UTB III—V-on-Insulator MIS Structure

We propose a physics-based analytical model for gate capacitance-voltage characteristics of ultra-thin-body III–V-on-insulator (XOI) MIS structure. The accuracy of the analytical model is verified by comparing with TCAD results. The model is general and is applicable to different III–V channel materials.

Dynamic performance of graphene field effect transistor with contact resistance

Here we report the impact of source/drain contact resistance on the dynamic characteristics of large area Graphene Field Effect Transistor (GFET). Although silicon has been the most widely used semiconductor in the channel of MOSFETs, it is approaching to its physical limits. On the other hand, graphene has been deeply studied as a potential alternative; however its zero band gap forbids the applicability in logic devices. Still GFETs have a great prospect in radio frequency (RF) and microwave devices mainly due to its excellent transport as well as structural properties. Here we found the contact resistance of realistic devices with Ti, Au, Pt, and Ni contact has a great impact on the transconductance as well as the cut-off frequency of the device. They are found to decrease by almost 60% when contact resistance goes to 750 Ω.

Performance of large area graphene FET considering the effect of strain

In this work, strained large area graphene is used in the channel of Graphene-FET (G-FET) to realize the G-FET in logic application. The strain dependent quantum confinement effect in terms of quantum capacitance is investigated and a drain current model is proposed under tight binding approximation. The influence of strain on the performance of G-FET as a function of gate voltage, channel length and oxide thickness is studied. The results obtained from the present study indicate that the performance of G-FET is highly influenced by the strain. It is also found that the strained G-FET satisfactorily meet the requirements for logic applications.

Gate oxide dependent performance of graphene FET using quasi-ballistic transport model

A quasi-ballistic transport model for graphene FET (GFET) is analyzed in this work. The effect of top and back gate oxide layers of the model with different dielectrics are considered to analyze the device performance. A comparative study considering the equivalent oxide thickness (EOT) for the different oxide layers is done using the proposed model. It is found by the simulation results that the use of high value dielectrics as oxide layers and equivalent oxide thickness improve the output drain current significantly.

Gate dielectric dependent performance of GNR MOSFET: A tight binding study

This paper presents the gate oxide dielectric strength and its thickness-dependent performance of a graphene nanoribbon MOSFET (GNRMOSFET). Here we have studied the transfer characteristics, on/off current (ION/IOFF) ratio, subthreshold slope and drain induced barrier lowering (DIBL) of the device using Non Equilibrium Greens Function (NEGF) formalism in tight binding frameworks. The results are obtained by solving the NEGF and Poissons equation self-consistently in NanoTCAD ViDES environment and found to have strong dependence on the oxide thickness as well as its dielectric strength.

Gate dielectric strength dependent performance of CNT TFET: A tight binding study

This article presents a detail study of the performance of CNT TFET taking into account of different dielectric strength of gate oxide materials. Here we have investigated the transfer characteristics, on/off current ratio (Ion/Ioff), subthreshold slope of the device using Non Equilibrium Greens Function (NEGF) formalism in tight binding frameworks. The results are obtained by solving the NEGF and Poissons equation self-consistently in NanoTCAD ViDES environment and found to have an interesting dependency of gate oxide dielectric strength over the performance of CNT TFET.