Michael Leibl

Design and Experimental Analysis of a Medium Frequency Transformer for Solid-State Transformer Applications

Within a solid-state transformer, the isolated dc–dc converter and in particular its medium-frequency transformer are one of the critical components, as it provides the required isolation between primary and secondary sides and the voltage conversion typically necessary for the operation of the system. A comprehensive optimization procedure is required to find a transformer design that maximizes power density and efficiency within the available degrees of freedom while complying with material limits, such as temperature, flux density, and dielectric strength as well as outer dimension limits. This paper presents an optimization routine and its underlying loss and thermal models, which are used to design a 166 kW/20 kHz transformer prototype achieving 99.4% efficiency at a power density of 44 kW/dm3. Extensive measurements are performed on the constructed prototype in order to measure core and winding losses and to investigate the current distribution within the litz wire and the flux sharing between the cores.

Design and Experimental Testing of a Resonant DC–DC Converter for Solid-State Transformers

In the solid-state transformer (SST) concept, the key task of voltage adaptation and isolation is performed by a high-power dc–dc converter, which is operated in the medium-frequency range, hence enabling a reduction in size and weight of the converters reactive components. This dc–dc converter presents the main challenge in the implementation of the SST concept, given its operation at medium frequency together with the direct connection to medium voltage. This combination demands the utilization of dc–dc converter topologies that are able to operate in the soft-switching mode, whereby, given that typically insulated-gate bipolar transistor switches are used as power devices, zero-current switching modulation schemes become highly attractive and often mandatory in order to achieve the targeted efficiency goals. This paper describes in detail the analysis and design of a 166-kW/20-kHz dc–dc converter of the series-resonant type, which results to be particularly interesting for high-power applications, given its tight input-to-output transfer characteristics and its capability to ensure soft-switching transitions of all semiconductor devices. The main focus of this paper is to describe in detail the practical implementation of the aforementioned resonant dc–dc converter, where its main components, i.e., the medium- and low-voltage-side power bridges and the medium-frequency transformer, are described independently. The assembled prototype is presented together with the implemented testing strategy and the final experimental results.

New Current Control Scheme for the Vienna Rectifier in Discontinuous Conduction Mode

The Vienna rectifier (VR) is used in applications that require unidirectional, non-isolated, three-phase AC to DC conversion with constant output voltage and sinusoidal input currents. However, because of the unidirectional topology, the input currents become discontinuous at small output power values. As a consequence, the relationship between rectifier input voltage and duty cycle changes compared to continuous conduction mode. Therefore, if no additional measures are taken, the rectifier input currents will be distorted. This work describes a new control scheme that allows operation of the VR with sinusoidal input currents in discontinuous conduction mode (DCM). The limits of operation are described, concerning maximum mains voltage, maximum midpoint current and minimum resistance to the mains in DCM. Further, the noise emission in DCM is compared to continuous conduction mode (CCM) operation. Finally, the proposed scheme is experimentally verified on a hardware prototype.

Comparative Analysis of Inductor Concepts for High Peak Load Low Duty Cycle Operation

In this work a compact-model-based inductor design procedure is presented. The losses, temperatures, and the total cost of ownership (TCO) of an inductor are expressed analytically. All geometric dependencies are summarized in a set of parameters which are calculated using finite element analysis (FEA). Therefore the model does not depend on the actual inductor geometry, instead it only relies on a generalized set of parameters which contain all geometric information. Different inductor geometries only result in different values of parameters. The dynamic thermal model is verified using time dependent FEA, the high frequency winding loss model is verified by measurements. The inductor model is then used to study the effect of changes in inductor geometry on the performance of the device. It is shown that for applications requiring high peak but low average load substantial cost reductions are achieved if the inductors geometry is optimized and the right inductor topology is selected.

New boundary mode sinusoidal input current control of the VIENNA rectifier

In hard switching boost-type or buck-type three-phase power factor corrected rectifier systems the turn-on losses in continuous conduction mode (CCM) are usually higher than the turn-off losses. This is mainly caused by the reverse recovery effect of the freewheeling diode. The reverse recovery related turn-on losses however may be eliminated if the converter is operated in boundary conduction mode (BCM), i.e. at the boundary of discontinuous conduction mode (DCM) and CCM. This paper shows that the Vienna Rectifier (VR) can be operated in BCM with zero current turn-on and that the reverse recovery current of the freewheeling diodes can be used to achieve partial zero voltage switching (ZVS). The principle of three-phase, three-level BCM control is described using space vectors, the effect of the variable switching frequency on the design of the input filter is investigated in detail and dimensioning criteria for the filter elements as well as the semiconductors are given. A current slope detector circuit using auxiliary windings on the input boost inductors is proposed for turning on the switches at minimum voltage. Further, a method to compensate the delay caused by the freewheeling diode reverse recovery time and an efficient implementation of the modulation with FPGAs using a quadratic counter is proposed. The proposed control scheme is finally experimentally verified on a hardware prototype.

Inductive Power Transfer Efficiency Limit of a Flat Half-Filled Disc Coil Pair

The efficiency limit for an inductive power transfer between two flat half-filled disc coils is derived based on a model for the eddy current losses in the coils and the losses due to electromagnetic radiation. Analytic approximations for the coupling factor of the coils and eddy current losses are proposed and experimentally verified. It is shown that the approximative terms allow us to express the maximum efficiency of the coil pair analytically. If the strand diameter of the coil is sufficiently small, the efficiency depends only on the strand diameter, diameter of the coils, and the gap between the coils—but not on the operating frequency. Therefore, increasing the frequency does not result in higher efficiency but allows to reduce the coil thickness.

Multi-level topology evaluation for ultra-efficient three-phase inverters

Multi-level topologies reduce the requirements on inductors and filters, however, given the high number of series connected semiconductors, it is still unclear if they are a suitable option to achieve ultra-high efficiency while maintaining a reasonable power density. For this purpose, an extensive quantitative evaluation of different topologies is carried out, to determine the required volume for a targeted 99.5% efficiency of a 10kW three-phase inverter. This includes the EMI noise filtering, where the Common Mode filter is placed on the DC-side to save losses and the impact of the upcoming EMI regulations covering the range from 2 kHz to 150 kHz is discussed. With an evaluation of multilevel topologies, it is shown that even if a high number of levels can reduce the size of the magnetic components by an order of magnitude, the volume and losses of the capacitive components required to create the multi-level voltage output have to be considered. An evaluation is done to quantify the performance of topologies ranging from two-level to seven-level topologies, and detailed designs of the three-level T-type and seven-level Hybrid Active Neutral Point Clamped converters are presented, achieving a relatively high power density of 2.2 kW/dm3 and 2.7 kW/dm3 respectively.

99.3% Efficient three-phase buck-type all-SiC SWISS Rectifier for DC distribution systems

DC power distribution systems for data centers, industrial applications and residential areas are expected to provide higher efficiency, reliability and lower cost compared to ac systems. Accordingly they have been an important research topic in recent years. In these applications an efficient power factor correction rectifier, supplying a dc distribution bus from the conventional three-phase ac mains is typically required. This paper analyzes the three-phase buck-type unity power factor SWISS Rectifier showing that its input current THD can be improved significantly by interleaving. The dc output filter is implemented using a current compensated Integrated Common Mode Coupled Inductor which ensures equal current sharing between interleaved half bridges and provides common mode inductance. Based on the analysis an high efficient 8 kW, 4 kW dm−3 (64 Win−3) lab-scale prototype converter is designed using SiC MOSFETS. Measurements taken on a hardware prototype confirm a full power efficiency of 99.16 % and a peak efficiency of 99.26 %.